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公开(公告)号:US20160209809A1
公开(公告)日:2016-07-21
申请号:US14994029
申请日:2016-01-12
Inventor: Yong Hae Kim , Chi-Sun Hwang , Gi Heon Kim , Himchan Oh , Hojun Ryu , Chunwon Byun , Myung Lae Lee , Jae Won Lee , Jae-Eun Pi
IPC: G03H1/30 , G02F1/1335 , G02F1/1343 , G03H1/22
CPC classification number: G03H1/30 , G02F1/133553 , G02F1/133617 , G02F1/134336 , G03H1/02 , G03H1/2294 , G03H2001/0224 , G03H2001/2263 , G03H2001/303 , G03H2225/35 , G03H2225/52
Abstract: Provided is a holographic display device. The holographic display device includes a light source unit configured to emit a light, and a spatial light modulator (SLM) configured to modulate at least one of a phase and amplitude of the light emitted from the light source unit to output a hologram image, and including a plurality of pixel groups that are arranged in a first direction, wherein each of the plurality of pixel groups includes: first pixels arranged in a matrix x1×y1 and providing an image having a first wavelength, and second pixels adjacent to the first pixels in the first direction, arranged in a matrix x2×y2, and providing an image having a second wavelength that is different from the first wavelength.
Abstract translation: 提供了一种全息显示装置。 全息显示装置包括被配置为发射光的光源单元和被配置为调制从光源单元发射的光的相位和幅度中的至少一个以输出全息图像的空间光调制器(SLM),以及 包括沿第一方向布置的多个像素组,其中所述多个像素组中的每一个包括:以矩阵x 1×y 1排列并提供具有第一波长的图像的第一像素和与所述第一像素相邻的第二像素 在第一方向上以矩阵x2×y2排列,并且提供具有与第一波长不同的第二波长的图像。
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公开(公告)号:US12144222B2
公开(公告)日:2024-11-12
申请号:US17525245
申请日:2021-11-12
Inventor: Chan-mo Kang , Sukyung Choi , Chunwon Byun , Jin Wook Shin , Hyunsu Cho
IPC: H10K59/35 , H10K50/115
Abstract: Provided is a display device. The display device includes a substrate having a pixel area including a first sub-pixel area, a second sub-pixel area, and a third sub-pixel area, a first control layer on the substrate, a second control layer on the first control layer, an intervening layer disposed between the first control layer and the second control layer on the first sub-pixel area and the second sub-pixel area, first quantum dots on the intervening layer of the first sub-pixel area, second quantum dots on the intervening layer of the second sub-pixel area, and an organic layer configured to cover a top surface and a side surface of the intervening layer between the first control layer and the second control layer.
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公开(公告)号:US11430836B2
公开(公告)日:2022-08-30
申请号:US16680724
申请日:2019-11-12
Inventor: Hyunsu Cho , Chan-mo Kang , Byoung-Hwa Kwon , Chunwon Byun , Jin Wook Shin , Hyunkoo Lee , Sukyung Choi
Abstract: A display device according to an embodiment of the inventive concept provides includes a substrate, a green light emitting element group and a blue light emitting element group, which are repeatedly arranged in a first direction parallel to a top surface of the substrate, and a red conversion pattern on the green light emitting element group and the blue light emitting element group. Here, the red conversion pattern overlaps a portion of the green light emitting element group and a portion of the blue light emitting element group in a second direction perpendicular to the top surface of the substrate.
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公开(公告)号:US10008155B2
公开(公告)日:2018-06-26
申请号:US15220713
申请日:2016-07-27
Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE , University-Industry Cooperation Group of Kyung Hee Univ
Inventor: Chunwon Byun , Jong-Heon Yang , Sung-Min Yoon , Kyoung Ik Cho , Chi-Sun Hwang
IPC: G09G3/12 , G09G3/3266 , G09G3/3233
CPC classification number: G09G3/3266 , G09G3/3233 , G09G2300/0842 , G09G2300/0861 , G09G2310/0286 , G09G2310/0289 , G09G2310/0291 , G09G2330/021 , G09G2330/028
Abstract: Provided is a gate driving circuit. The gate driving circuit includes an ith modulation circuit and an ith line selection circuit (where i is a natural number greater than 1). The ith modulation circuit outputs an ith modulation voltage to an ith line selection circuit based on received first to third control signals. The ith line selection circuit includes a memory transistor that is turned on or turned off according to a level of the received ith modulation voltage.
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公开(公告)号:US09728149B2
公开(公告)日:2017-08-08
申请号:US15007856
申请日:2016-01-27
Inventor: Chunwon Byun , Jae-Eun Pi , Kyoung Ik Cho , Hye Yong Chu , Chi-Sun Hwang
IPC: G09G3/36 , G09G3/3233
CPC classification number: G09G3/3648 , G09G3/3233 , G09G2300/023 , G09G2300/046 , G09G2300/0842
Abstract: A display panel includes pixels connected to each of gate lines and data lines. Each of the pixels includes a first transistor connected between a corresponding data line among the data lines and a first node and configured to deliver a data signal of the corresponding data line to the first node in response to an input signal received through a corresponding gate line among the gate lines, a reflective element circuit connected to the first node, and configured to implement the reflective mode in response to a signal of the first node when a first mode selection signal indicates a reflective mode, an emissive element circuit connected to a second node, and configured to implement the emissive mode in response to the signal of the first node when the mode selection mode indicates an emissive mode.
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公开(公告)号:US09613984B2
公开(公告)日:2017-04-04
申请号:US14446394
申请日:2014-07-30
Inventor: Jong-Heon Yang , Jonghyurk Park , Chunwon Byun , Chi-Sun Hwang
IPC: H01L27/12 , H01L27/14 , H01L27/146 , H01L27/32 , H01L29/66
CPC classification number: H01L27/1225 , H01L27/12 , H01L27/1214 , H01L27/1222 , H01L27/124 , H01L27/1259 , H01L27/127 , H01L27/14 , H01L27/14609 , H01L27/14689 , H01L27/32 , H01L27/3241 , H01L27/3244 , H01L29/66757
Abstract: Provided are a display device, a method of fabricating the display device, and a method of fabricating an image sensor device. The method of fabricating the display device includes preparing a substrate including a cell array area and a peripheral circuit area, forming a silicon layer on the peripheral circuit area of the substrate, forming oxide layers on the cell array area and the peripheral circuit area of the substrate, forming gate dielectric layers on the silicon layer and the oxide layers, forming the gate electrodes on the gate dielectric layers, wherein the gate electrodes expose both ends of the silicon layer and both ends of the oxide layers, and injecting dopant into both ends of the silicon layer and both ends of the oxide layers at the same time.
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