公开(公告)号：US20190036832A1

公开(公告)日：2019-01-31

申请号：US15663084

申请日：2017-07-28

Applicant: Cisco Technology, Inc.

Inventor： John J. Williams, JR. ,  Naader Hasani ,  Mohammed Ismael Tatar ,  David Delano Ward

IPC: H04L12/801 ,  H04L12/861 ,  H04L12/875

CPC classification number: H04L47/34 ,  H04L47/56 ,  H04L49/25 ,  H04L49/9057

Abstract: In one embodiment, for each distribution period of time, each packet flow is assigned to a path through a packet switching device (e.g., switch fabric) with all packets of the packet flow being sent in order over the assigned path. For a next distribution period, different paths are assigned for these packet flows, with all packets being sent in order over the new corresponding selected path. In one embodiment, these paths are switched often enough to prevent congestion, yet infrequent enough so as to minimize resources for reordering. In one embodiment, the reordering is done at the egress and only for predefined high bandwidth flows (e.g., elephant flows). A distribution period indication is typically associated with each packet to identify its corresponding distribution period. In one embodiment, each routing and egress switching stage in a switching fabric performs reordering.

公开(公告)号：US10715455B2

公开(公告)日：2020-07-14

申请号：US15663084

申请日：2017-07-28

Applicant: Cisco Technology, Inc.

Inventor： John J. Williams, Jr. ,  Naader Hasani ,  Mohammed Ismael Tatar ,  David Delano Ward

IPC: H04L12/801 ,  H04L12/947 ,  H04L12/861 ,  H04L12/875

Abstract: In one embodiment, for each distribution period of time, each packet flow is assigned to a path through a packet switching device (e.g., switch fabric) with all packets of the packet flow being sent in order over the assigned path. For a next distribution period, different paths are assigned for these packet flows, with all packets being sent in order over the new corresponding selected path. In one embodiment, these paths are switched often enough to prevent congestion, yet infrequent enough so as to minimize resources for reordering. In one embodiment, the reordering is done at the egress and only for predefined high bandwidth flows (e.g., elephant flows). A distribution period indication is typically associated with each packet to identify its corresponding distribution period. In one embodiment, each routing and egress switching stage in a switching fabric performs reordering.

公开(公告)号：US20190372896A1

公开(公告)日：2019-12-05

申请号：US16541931

申请日：2019-08-15

Applicant: Cisco Technology, Inc.

Inventor： Naader Hasani ,  Shishir Gupta ,  David Delano Ward ,  Mohammed Ismael Tatar ,  Shahin Habibi ,  Sreedhar Ravipalli ,  David Richard Barach

IPC: H04L12/743 ,  H04L12/745

Abstract: One embodiment performs longest prefix matching operations in one or more different manners that provides packet processing and/or memory efficiencies in the processing of packets. In one embodiment, a packet switching device determines a set of one or more mask lengths of a particular conforming entry of a multibit trie or other data structure that matches a particular address of a packet via a lookup operation in a mask length data structure. A conforming entry refers to an entry which has less than or equal to a maximum number of different prefix lengths, with this maximum number corresponding to the maximum number of prefix lengths which can be searched in parallel in the address space for a longest matching prefix by the implementing hardware. The packet switching device then performs corresponding hash table lookup operation(s) in parallel in determining an overall longest matching prefix for the particular address.

公开(公告)号：US10397115B1

公开(公告)日：2019-08-27

申请号：US15949060

申请日：2018-04-09

Applicant: Cisco Technology, Inc.

Inventor： Naader Hasani ,  Shishir Gupta ,  David Delano Ward ,  Mohammed Ismael Tatar ,  Shahin Habibi ,  Sreedhar Ravipalli ,  David Richard Barach

IPC: H04L12/743 ,  H04L12/745

Abstract: One embodiment performs longest prefix matching operations in one or more different manners that provides packet processing and/or memory efficiencies in the processing of packets. In one embodiment, a packet switching device determines a set of one or more mask lengths of a particular conforming entry of a multibit trie or other data structure that matches a particular address of a packet via a lookup operation in a mask length data structure. A conforming entry refers to an entry which has less than or equal to a maximum number of different prefix lengths, with this maximum number corresponding to the maximum number of prefix lengths which can be searched in parallel in the address space for a longest matching prefix by the implementing hardware. The packet switching device then performs corresponding hash table lookup operation(s) in parallel in determining an overall longest matching prefix for the particular address.

公开(公告)号：US20180241688A1

公开(公告)日：2018-08-23

申请号：US15439144

申请日：2017-02-22

Applicant: Cisco Technology, Inc.

Inventor： John J. Williams, JR. ,  Dipankar Bhatt Acharya ,  Mohammed Ismael Tatar ,  David Delano Ward

IPC: H04L12/869 ,  H04L1/18 ,  H04L12/851

CPC classification number: H04L47/58 ,  H04L1/1835 ,  H04L45/24 ,  H04L47/30 ,  H04L49/10

Abstract: One embodiment includes multiple distribution nodes sending packets of different ordered sets of packets among multiple packet switching devices arranged in a single stage topology to reach a reordering node. The reordering node receives these packets sent over the different paths and stores them in reordering storage, such as, but not limited to, in queues for each distribution node and packet switching device combination. The reordering node sends packets stored in the reordering storage from the reordering node in original orderings. In response to determining that an aggregation quantum of packets received from the multiple distribution nodes via a particular packet switching device and stored in the reordering storage is outside a range or value, packets being communicated via the particular packet switching device to the reordering node are rate limited.

公开(公告)号：US20180159779A1

公开(公告)日：2018-06-07

申请号：US15372330

申请日：2016-12-07

Applicant: Cisco Technology, Inc.

Inventor： John J. Williams, Jr. ,  Mohammed Ismael Tatar ,  David Delano Ward

IPC: H04L12/813 ,  H04L29/06 ,  H04L12/823 ,  H04L12/947 ,  H04L12/803 ,  H04L12/863

CPC classification number: H04L47/20 ,  H04L45/22 ,  H04L47/122 ,  H04L47/125 ,  H04L47/32 ,  H04L47/50 ,  H04L49/25 ,  H04L69/16

Abstract: One embodiment includes a packet switching device load balancing eligible packets in response to a policing drop decision. The packet switching device sends packets of a particular packet flow out of the packet switching device over a first path in the network towards a destination node; and in response to a policer discipline determining to drop a particular packet of the particular packet flow, switching from said sending packets over the first path to sending packets of the particular packet flow out of the packet switching device over a second path in the network towards the destination node (possibly by switching output queues associated with the two different paths), with the second path being different than the first path, and with the particular packet not being dropped but being sent out of the packet switching device towards the destination node.