公开(公告)号：US10986316B2

公开(公告)日：2021-04-20

申请号：US16352651

申请日：2019-03-13

Applicant: Cista System Corp.

Inventor： Hirofumi Komori ,  Dennis Tunglin Lee ,  Guangbin Zhang ,  Jingzhou Zhang

IPC: H04N9/04 ,  H04N5/378 ,  H04N5/355 ,  H04N5/3745 ,  H01L27/146 ,  G06T3/40

Abstract: A high dynamic range sensing device is disclosed. The device may comprise an array of Bayer-pattern units of color filters, each of the color filters corresponding to a pixel of the sensing device, and each of the color filters overlapping with a plurality of photodiodes.

公开(公告)号：US10284802B2

公开(公告)日：2019-05-07

申请号：US15869181

申请日：2018-01-12

Applicant: CISTA SYSTEM CORP.

Inventor： Guangbin Zhang

IPC: H03M1/12 ,  H03M1/18 ,  H04N5/378 ,  H04N5/3745

Abstract: A system and method is provided for image sensing. The image sensing system includes a comparator for comparing an input signal representing a sensed light signal from at least one pixel of the image sensing system and a reference signal. The comparator includes at least one digital transistor.

公开(公告)号：US09894307B2

公开(公告)日：2018-02-13

申请号：US15410498

申请日：2017-01-19

Applicant: CISTA SYSTEM CORP.

Inventor： Dennis Tunglin Lee ,  Guangbin Zhang

IPC: H03K4/02 ,  H04N5/376 ,  H04N5/378 ,  H03K4/08 ,  H03K4/12 ,  H03K4/26 ,  H03K4/48 ,  H04N5/365

CPC classification number: H04N5/3765 ,  H03K4/02 ,  H03K4/08 ,  H03K4/12 ,  H03K4/26 ,  H03K4/48 ,  H04N5/3655 ,  H04N5/3658 ,  H04N5/378

Abstract: A system is provided for generating a ramping signal. The system includes a plurality of storage circuits each including an input and an output. The output of a previous storage circuit is connected to the input of a next storage circuit. The storage circuits are configured to propagate a first enable signal based on a first control signal. The system also includes a plurality of first current generating circuits. Each first current generating circuit is coupled to the output of a corresponding storage circuit to receive the propagated first enable signal. The first current generating circuits are configured to generate a first current signal based on the propagated first enable signal.

公开(公告)号：US20170134684A1

公开(公告)日：2017-05-11

申请号：US15410498

申请日：2017-01-19

Applicant: CISTA SYSTEM CORP.

Inventor： Dennis Tunglin Lee ,  Guangbin Zhang

IPC: H04N5/376 ,  H03K4/48 ,  H04N5/378 ,  H03K4/02

CPC classification number: H04N5/3765 ,  H03K4/02 ,  H03K4/08 ,  H03K4/12 ,  H03K4/26 ,  H03K4/48 ,  H04N5/3655 ,  H04N5/3658 ,  H04N5/378

Abstract: A system is provided for generating a ramping signal. The system includes a plurality of storage circuits each including an input and an output. The output of a previous storage circuit is connected to the input of a next storage circuit. The storage circuits are configured to propagate a first enable signal based on a first control signal. The system also includes a plurality of first current generating circuits. Each first current generating circuit is coupled to the output of a corresponding storage circuit to receive the propagated first enable signal. The first current generating circuits are configured to generate a first current signal based on the propagated first enable signal.

公开(公告)号：US20170018593A1

公开(公告)日：2017-01-19

申请号：US15211936

申请日：2016-07-15

Applicant: Cista System Corp.

Inventor： Wenhao Qiao ,  Guangbin Zhang ,  Dennis Tunglin Lee

IPC: H01L27/146 ,  H03M3/00 ,  H03L7/197 ,  H03L7/08 ,  H03K4/08

CPC classification number: H01L27/14643 ,  H01L27/14609 ,  H03K4/08 ,  H03K6/04 ,  H03L7/1976 ,  H03M1/56 ,  H03M3/30

Abstract: A device for generating a ramp signal with a changing slope is disclosed. The device may comprise a processor configured to generate a variable signal. The device may also comprise a phase-locked loop (PLL) circuit configured to receive the variable signal and a reference clock signal, generate a changing ramp clock signal based on the variable signal and the reference clock signal, and output the generated changing ramp clock signal as an input of an analog-to-digital-converter (ADC) circuit.

Abstract translation: 公开了一种用于产生斜率变化的斜坡信号的装置。 该设备可以包括被配置为生成可变信号的处理器。 该装置还可以包括配置为接收可变信号和参考时钟信号的锁相环（PLL）电路，基于可变信号和参考时钟信号产生改变的斜坡时钟信号，并输出所产生的变化斜坡时钟 信号作为模数转换器（ADC）电路的输入。