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公开(公告)号:US20210185620A1
公开(公告)日:2021-06-17
申请号:US17188585
申请日:2021-03-01
Applicant: Apple Inc.
Inventor: Digvijay Arjunrao Jadhav , Indranil S. Sen , Jonathan C. King , Mohit Narang , Prathyusha Sangepu , Qiong Wu , Shrenik Milapchand , Vijay Gadde , Yu Chen
IPC: H04W52/26
Abstract: Multi-radio wireless network devices are capable of transmitting and/or receiving data from multiple radiofrequency (RF) networks at different bands. Total transmission power limitations may be in place due to, for example, safety reasons. As a result, active management of transmission power may be performed during simultaneous transmission in different bands and/or networks. In some embodiments, the management may take place on group-by-group basis and a network-by-network basis. Antennas may be grouped based on their relative positions and impact on radiation emitted by the devices.
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公开(公告)号:US20230388162A1
公开(公告)日:2023-11-30
申请号:US17804476
申请日:2022-05-27
Applicant: Apple Inc.
Inventor: Lizhi Zhong , Vishal Varma , Yu Chen , Wenyi Jin
CPC classification number: H04L25/03267 , H04B1/10
Abstract: A receiver circuit including mechanisms for analog channel equalization and channel adaptation is disclosed. The receiver includes a front-end circuit configured to generate a filtered signal by performing filtering of an incoming signal that includes a stream of data symbols. A sample recovery circuit configured to sample an equalized signal, based on the filtered signal, to generate a plurality of recovered data symbols. A decision feedback equalization (DFE) circuit configured to generate the feedback signal based on the plurality of recovered data symbols. A logic circuit is configured to cause adjustment to one or more filters in the front-end circuit based on the plurality of recovered data symbols.
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公开(公告)号:US20210208621A1
公开(公告)日:2021-07-08
申请号:US16736776
申请日:2020-01-07
Applicant: Apple Inc.
Inventor: Meei-Ling Chiang , Dabin Zhang , Dennis M. Fischette, JR. , Shaobo Liu , Yu Chen , Samed Maltabas
IPC: G06F1/04
Abstract: Systems, apparatuses, and methods for implementing a hybrid asynchronous gray counter with a non-gray zone detector are described. A circuit includes an asynchronous gray counter coupled to control logic. The control logic programs the asynchronous gray counter to operate in different modes to perform various functions associated with a high-performance phase-locked loop (PLL). In a first mode, the asynchronous gray counter serves as a frequency detector to count oscillator cycles within a reference clock cycle. In a second mode, the asynchronous gray counter serves as a coarse phase detector to detect a phase error between a feedback clock and a reference clock. In a third mode, the asynchronous gray counter serves as a multi-modulus divider to divide an oscillator clock down to create a feedback clock. Using a single asynchronous gray counter for three separate functions reduces power consumption and area utilization.
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公开(公告)号:US20190084005A1
公开(公告)日:2019-03-21
申请号:US15846809
申请日:2017-12-19
Applicant: Apple Inc.
Inventor: Lok Pui Calvin Tsang , Yu Chen , Qingguo Zhao , Weiqiang Fu , Hong Feng Wang , Chung Yin Au
Abstract: An electronic device includes an enclosure, a display positioned with the enclosure and defining a front face of the electronic device, and a haptic actuator positioned within the enclosure. The haptic actuator includes a housing comprising a wall and a movable mass positioned within the housing and configured to move within the housing to cause the haptic actuator to produce a vibrational response. The vibrational response includes a first component within a frequency range and a second component outside of the frequency range and providing a haptic output portion of the vibrational response. The haptic actuator also includes a tuning feature incorporated with the wall and configured to reduce the first component of the vibrational response while substantially maintaining the haptic output portion of the vibrational response.
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