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    Reducing touch pixel coupling
    11.
    发明授权
    Reducing touch pixel coupling 有权
    减少触摸像素耦合

    公开(公告)号：US09535544B2

    公开(公告)日：2017-01-03

    申请号：US13907698

    申请日：2013-05-31

    Applicant: Apple Inc.

    Inventor： Marduke Yousefpor ,  Taif Ahmed Syed ,  Ahmad Al-Dahle ,  Kevin J. White ,  Abbas Jamshidi-Roudbari ,  Stephen S. Poon

    IPC: G06F3/044 ,  G06F3/041

    CPC classification number: G06F3/044 ,  G06F3/0412 ,  G06F2203/04107

    Abstract: A touch screen to reduce touch pixel coupling. In some examples, the touch screen can include a first display pixel and a second display pixel in a row of display pixels, where the first display pixel can be configurable to be decoupled from the second display pixel during at least a touch sensing phase of the touch screen. In some examples, the touch screen can include a display pixel having a first and a second transistor, where the second transistor can be electrically connected to a gate terminal of the first transistor, and can be diode-connected. In some examples, the touch screen can include two display pixels, each display pixel having two transistors, where two of the transistors can be electrically connected to a first gate line, and the remaining two transistors can be individually electrically connected to a second and third gate line, respectively.

    Abstract translation: 触摸屏可以减少触摸像素耦合。 在一些示例中，触摸屏可以包括一排显示像素中的第一显示像素和第二显示像素，其中第一显示像素可以被配置为在至少一个触摸感测阶段期间与第二显示像素解耦 触摸屏。 在一些示例中，触摸屏可以包括具有第一和第二晶体管的显示像素，其中第二晶体管可以电连接到第一晶体管的栅极端子，并且可以二极管连接。 在一些示例中，触摸屏可以包括两个显示像素，每个显示像素具有两个晶体管，其中两个晶体管可以电连接到第一栅极线，并且剩余的两个晶体管可以单独地电连接到第二和第三晶体管 门线。

    Determination and reduction of parasitic capacitance variation due to display noise
    16.
    发明授权
    Determination and reduction of parasitic capacitance variation due to display noise 有权
    确定和减少由于显示噪声引起的寄生电容变化

    公开(公告)号：US09329738B2

    公开(公告)日：2016-05-03

    申请号：US14023118

    申请日：2013-09-10

    Applicant: Apple Inc.

    Inventor： Marduke Yousefpor ,  Stephen S. Poon

    IPC: G06F3/044 ,  G06F3/041

    CPC classification number: G06F3/044 ,  G06F3/0418

    Abstract: Embodiments described herein generally take the form of methods and systems for identifying and/or reducing a parasitic capacitance variation in a capacitive integrated touch-sensing module that may arise from proximity to a nearby electronic display.

    Abstract translation: 本文描述的实施例通常采用用于识别和/或减少可能由邻近的电子显示器附近产生的电容集成触摸感测模块中的寄生电容变化的方法和系统的形式。

    Encapsulation Layers with Improved Reliability
    17.
    发明申请
    Encapsulation Layers with Improved Reliability 有权
    具有提高可靠性的封装层

    公开(公告)号：US20150333293A1

    公开(公告)日：2015-11-19

    申请号：US14705364

    申请日：2015-05-06

    Applicant: Apple Inc.

    Inventor： Stephen S. Poon ,  Chih Jen Yang ,  Damien S. Boesch ,  Bhadrinarayana L. Visweswaran

    IPC: H01L51/52 ,  H01L27/32 ,  H01L51/56

    CPC classification number: H01L51/5253 ,  H01L27/32 ,  H01L51/56

    Abstract: An electronic device may include a display having an array of organic light-emitting diodes formed on a substrate. An encapsulation layer may be formed over the array of organic light-emitting diodes to protect the organic light-emitting diodes from moisture and other contaminants. The encapsulation layer may include a transparent sheet of material interposed between upper and lower inorganic films. The reliability of the encapsulation layer is increased by dividing one or both of the inorganic films into multiple sub-layers. The sub-layers may have different densities and may be deposited in sequential steps. Additional moisture protection may be provided by forming a conformal thin-film coating over the organic light-emitting diodes. The conformal thin-film coating may be an aluminum oxide layer that is formed using atomic layer deposition techniques.

    Abstract translation: 电子设备可以包括具有形成在基板上的有机发光二极管的阵列的显示器。 可以在有机发光二极管的阵列之上形成封装层，以保护有机发光二极管免受湿气和其它污染物的影响。 封装层可以包括介于上下无机膜之间的透明材料片。 通过将一个或两个无机膜分成多个子层来增加封装层的可靠性。 子层可以具有不同的密度并且可以按顺序沉积。 可以通过在有机发光二极管上形成共形薄膜涂层来提供额外的防潮保护。 保形薄膜涂层可以是使用原子层沉积技术形成的氧化铝层。

    Hydrogenation and Crystallization of Polycrystalline Silicon
    18.
    发明申请
    Hydrogenation and Crystallization of Polycrystalline Silicon 审中-公开
    多晶硅的氢化和结晶

    公开(公告)号：US20140070225A1

    公开(公告)日：2014-03-13

    申请号：US14020620

    申请日：2013-09-06

    Applicant: Apple Inc.

    Inventor： Cheng-Ho Yu ,  Marduke Yousefpor ,  Yu-Cheng Chen ,  Stephen S. Poon ,  Ting-Kuo Chang ,  Young Bae Park

    IPC: H01L29/786 ,  H01L29/66

    CPC classification number: H01L29/78675 ,  H01L27/1222 ,  H01L27/1248 ,  H01L27/127 ,  H01L29/66757

    Abstract: A TFT stack for a liquid crystal display is provided. The TFT stack includes a silicon layer that includes a heavily doped region, a non-doped region, and a lightly doped region between the heavily doped region and the non-doped region. The heavily doped region is hydrogenated. The TFT stack also includes an insulation layer that includes a first portion formed over the lightly doped region and a second portion disposed over the non-doped region and a gate metal electrode layer formed over the second portion of the non-doped region. The TFT stack also includes a first dielectric layer disposed over the gate metal electrode and over the first portion of the insulation layer. The heavily doped region is hydrogenated to reduce the dependence of the capacitance between the gate metal electrode and the conductive layer Cgd upon a bias voltage being applied between the gate metal electrode and the conductive layer.

    Abstract translation: 提供了一种用于液晶显示器的TFT堆叠。 TFT堆叠包括硅层，其包括重掺杂区域，非掺杂区域和重掺杂区域和非掺杂区域之间的轻掺杂区域。 重掺杂区被氢化。 TFT堆叠还包括绝缘层，其包括形成在轻掺杂区域上的第一部分和设置在非掺杂区域上的第二部分，以及形成在非掺杂区域的第二部分上的栅极金属电极层。 TFT堆叠还包括设置在栅极金属电极上方并在绝缘层的第一部分之上的第一介电层。 氢化重掺杂区域，以便在施加在栅极金属电极和导电层之间的偏置电压时，减小栅极金属电极和导电层Cgd之间的电容的依赖性。

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