公开(公告)号：US11777479B2

公开(公告)日：2023-10-03

申请号：US17977191

申请日：2022-10-31

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Ali Moaz ,  Tim Schoenauer ,  Rahmi Hezar

IPC: H03K5/1252 ,  G06F21/71

CPC classification number: H03K5/1252 ,  G06F21/71

Abstract: Embodiments relate to identifying frequencies to be protected at a victim integrated circuit (IC) and sending protection information including the identified frequencies to an aggressor IC. The aggressor IC configures its subsystems or circuits to operate using operating frequencies that prevents spurs that may interfere with the frequencies identified in the protection information. If not all of the frequencies in the protection information can be protected, the aggressor IC selects a subset of the frequencies to be protected. Then, the aggressor IC configures the operating frequencies of its subsystems or circuits so that spurs that they generate do not interfere with the selected frequencies.

公开(公告)号：US11640365B2

公开(公告)日：2023-05-02

申请号：US17500325

申请日：2021-10-13

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Camille Chen ,  Vijay Kumar Ramamurthi ,  Alon Paycher ,  Matthias Sauer ,  Bernd W. Adler

IPC: G06F13/36 ,  G06F13/362 ,  G06F13/24 ,  G06F11/34 ,  G06F11/30 ,  G06F13/28

Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.

公开(公告)号：US20230072903A1

公开(公告)日：2023-03-09

申请号：US17469272

申请日：2021-09-08

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Dmitry Cherniavsky ,  Tim Schoenauer ,  Ali Moaz ,  Rahmi Hezar ,  Ram Kanumalli

IPC: H03K5/1252 ,  G06F13/40 ,  G06F1/08

Abstract: Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.

公开(公告)号：US11522531B1

公开(公告)日：2022-12-06

申请号：US17469294

申请日：2021-09-08

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Ali Moaz ,  Tim Schoenauer ,  Rahmi Hezar

IPC: H03K5/1252 ,  G06F21/71

Abstract: Identifying frequencies to be protected at a victim integrated circuit (IC) and sending protection information including the identified frequencies to an aggressor IC. The aggressor IC configures its subsystems or circuits to operate using operating frequencies that prevents spurs that may interfere with the frequencies identified in the protection information. If not all of the frequencies in the protection information can be protected, the aggressor IC selects a subset of the frequencies to be protected. Then, the aggressor IC configures the operating frequencies of its subsystems or circuits so that spurs that they generate do not interfere with the selected frequencies.

公开(公告)号：US12001364B2

公开(公告)日：2024-06-04

申请号：US18124332

申请日：2023-03-21

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Camille Chen ,  Vijay Kumar Ramamurthi ,  Alon Paycher ,  Matthias Sauer ,  Bernd W. Adler

IPC: G06F13/362 ,  G06F11/30 ,  G06F11/34 ,  G06F13/24 ,  G06F13/28 ,  G06F13/40

CPC classification number: G06F13/3625 ,  G06F11/3051 ,  G06F11/3409 ,  G06F13/24 ,  G06F13/28 ,  G06F13/4068 ,  G06F2213/0038 ,  G06F2213/40

Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.

公开(公告)号：US11978422B2

公开(公告)日：2024-05-07

申请号：US17818237

申请日：2022-08-08

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Matthias Sauer ,  Jorge L. Rivera Espinoza

IPC: G06F13/20 ,  G06F12/14 ,  G06F13/40 ,  G06F13/42 ,  G09G5/00

CPC classification number: G09G5/006 ,  G06F12/1458 ,  G06F13/4027 ,  G06F13/4221

Abstract: Embodiments relate to a billboard circuit that stores context information received from various component circuits in an electronic device. The context information indicates an operating status of the corresponding component circuit, system or shared resources. The stored context information may be retrieved by one or more component circuits when events (e.g., turning on of a component circuit) are detected. By using the billboard circuit, a component circuit may detect changes in the operating status of other components circuits and configure or update its operations even when the changes occurred while the component circuit was asleep or disabled. The billboard circuit may monitor updating of the context information by the component circuit and initiate notification to other components circuits when certain entries of the context information is updated.

公开(公告)号：US11863346B2

公开(公告)日：2024-01-02

申请号：US18103137

申请日：2023-01-30

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Matthias Sauer ,  Jorge L. Rivera Espinoza

IPC: H04L12/40 ,  H04L12/413

CPC classification number: H04L12/4135 ,  H04L12/40071 ,  H04L12/40084 ,  H04L2012/40215

Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

公开(公告)号：US11595230B2

公开(公告)日：2023-02-28

申请号：US17854979

申请日：2022-06-30

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Matthias Sauer ,  Jorge L. Rivera Espinoza

IPC: H04L12/40 ,  H04L12/413

Abstract: Embodiments relate to including information in a data packet transmitted by a transmitting integrated circuit (e.g., SOC) to account for a time delay associated with an unsuccessful arbitration attempt to send the data packet over a multi-drop bus. The unsuccessful arbitration attempt by the integrated circuit may delay the transmission of the data packet until the multi-drop bus becomes available for the integrated circuit to send the data packet. The data packet includes a data field to include time delay information caused by the unsuccessful arbitration attempt. A receiving integrated circuit may determine the time that the data packet would have been sent out from the transmitting integrated circuit absent the unsuccessful arbitration attempt based on the delay information. Embodiments also relate to a synchronization generator circuit in an integrated circuit that generates timing signals indicating times at which periodic events occur at another integrated circuit.

公开(公告)号：US20220035757A1

公开(公告)日：2022-02-03

申请号：US17500325

申请日：2021-10-13

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Camille Chen ,  Vijay Kumar Ramamurthi ,  Alon Paycher ,  Matthias Sauer ,  Bernd W. Adler

IPC: G06F13/362 ,  G06F13/24 ,  G06F11/34 ,  G06F11/30 ,  G06F13/28

Abstract: Embodiments relate to an integrated circuit of an electronic device that coordinates activities with another integrated circuit of the electronic device. The integrated circuit includes an interface circuit and a processor circuit. The interface circuit communicates over a multi-drop bus connected to multiple electronic components. The processor circuit receives an authorization request from the integrated circuit via the interface circuit and the multi-drop bus. The received authorization request relates to authorization to perform an activity on the other integrated circuit. In response to receiving the authorization request, the processor circuit determines whether the other integrated circuit is authorized to execute the activity. In response to determining that the other integrated circuit is authorized to execute the activity, the processor circuit sends, to the other integrated circuit over a configurable direct connection, an authorization signal authorizing the other integrated circuit to execute the activity.

公开(公告)号：US12003244B2

公开(公告)日：2024-06-04

申请号：US17469272

申请日：2021-09-08

Applicant: Apple Inc.

Inventor： Helena Deirdre O'Shea ,  Dmitry Cherniavsky ,  Tim Schoenauer ,  Ali Moaz ,  Rahmi Hezar ,  Ram Kanumalli

IPC: H04B1/10 ,  G06F1/08 ,  G06F13/40 ,  H03K5/1252

CPC classification number: H03K5/1252 ,  G06F1/08 ,  G06F13/4027

Abstract: Embodiments relate to updating spur cancellation at a victim integrated circuit (IC) in accordance with dynamic changes in the operating frequencies of an aggressor IC. The aggressor IC changes its operating frequencies at an update time that is determined in advance. The update time and the changes to the operating frequencies are shared with the victim IC. The victim IC dynamically updates the relationships between frequencies of local clock signals for the victim IC and the aggressor IC. The victim IC generates a spur cancellation parameter based on the updated relationships of local clock frequencies, the update time and the changes to the operating frequencies of the aggressor IC, and configures a spur cancellation circuit. In this way, the victim IC may perform effective spur cancellation despite changes in the operating frequencies of the aggressor IC and deviation of the local clock frequencies.