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19 条记录 (耗时 0.016 秒)

    SEMICONDUCTOR DEVICE
    11.
    发明申请
    SEMICONDUCTOR DEVICE 失效
    半导体器件

    公开(公告)号：US20070228519A1

    公开(公告)日：2007-10-04

    申请号：US11692290

    申请日：2007-03-28

    申请人： Makoto Miyoshi ,  Yoshitaka Kuraoka

    发明人： Makoto Miyoshi ,  Yoshitaka Kuraoka

    IPC分类号： H01L29/00

    CPC分类号： H01L29/872 ,  H01L29/2003 ,  H01L29/66462

    摘要： A semiconductor device made of a group-III nitride semiconductor having excellent properties is provided. The semiconductor device has a horizontal diode structure of Schottky type or P—N junction type, or combined type thereof having a main conduction pathway in the horizontal direction in a conductive layer with unit anode portions and unit cathode electrodes being integrated adjacently to each other in the horizontal direction. The conductive layer is preferably formed by depositing a group-III nitride layer and generating a two-dimensional electron gas layer on the interface. Forming the conductive layer of the group-III nitride having high breakdown field allows the breakdown voltage to be kept high while the gap between electrodes is narrow, which achieves a semiconductor device having high output current per chip area. Further, an electrode pad layer provided on an insulation protecting layer relieves electric field concentration at a junction of each unit anode portion and each unit cathode electrode, which achieves higher breakdown voltage.

    摘要翻译： 提供由具有优异特性的III-III族氮化物半导体制成的半导体器件。 半导体器件具有肖特基型或PN结型的水平二极管结构，或者其组合型在导电层中具有在水平方向上的主导电通路，其中单元阳极部分和单元阴极电极在水平方向彼此相邻地相互整合 方向。 导电层优选通过沉积III族氮化物层并在界面上产生二维电子气层形成。 形成具有高击穿场的III族氮化物的导电层允许击穿电压保持较高，同时电极之间的间隙窄，这实现了每芯片面积具有高输出电流的半导体器件。 此外，设置在绝缘保护层上的电极焊盘层可以减轻每个单元阳极部分和每个单位阴极电极的接合处的电场浓度，从而实现更高的击穿电压。

    Semiconductor device
    13.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号：US08044485B2

    公开(公告)日：2011-10-25

    申请号：US11692290

    申请日：2007-03-28

    申请人： Makoto Miyoshi ,  Yoshitaka Kuraoka

    发明人： Makoto Miyoshi ,  Yoshitaka Kuraoka

    IPC分类号： H01L29/47

    CPC分类号： H01L29/872 ,  H01L29/2003 ,  H01L29/66462

    摘要： A semiconductor device made of a group-III nitride semiconductor having excellent properties is provided. The semiconductor device has a horizontal diode structure of Schottky type or P-N junction type, or combined type thereof having a main conduction pathway in the horizontal direction in a conductive layer with unit anode portions and unit cathode electrodes being integrated adjacently to each other in the horizontal direction. The conductive layer is preferably formed by depositing a group-III nitride layer and generating a two-dimensional electron gas layer on the interface. Forming the conductive layer of the group-III nitride having high breakdown field allows the breakdown voltage to be kept high while the gap between electrodes is narrow, which achieves a semiconductor device having high output current per chip area. Further, an electrode pad layer provided on an insulation protecting layer relieves electric field concentration at a junction of each unit anode portion and each unit cathode electrode, which achieves higher breakdown voltage.

    摘要翻译： 提供由具有优异特性的III-III族氮化物半导体制成的半导体器件。 半导体器件具有肖特基型或PN结型的水平二极管结构，或者其组合型在导电层中具有在水平方向上的主导电通路，其中单元阳极部分和单元阴极电极在水平方向彼此相邻地相互整合 方向。 导电层优选通过沉积III族氮化物层并在界面上产生二维电子气层形成。 形成具有高击穿场的III族氮化物的导电层允许击穿电压保持较高，同时电极之间的间隙窄，这实现了每芯片面积具有高输出电流的半导体器件。 此外，设置在绝缘保护层上的电极焊盘层可以减轻每个单元阳极部分和每个单位阴极电极的接合处的电场浓度，从而实现更高的击穿电压。

    Method for manufacturing group III nitride single crystals
    16.
    发明授权
    Method for manufacturing group III nitride single crystals 有权
    III族氮化物单晶的制造方法

    公开(公告)号：US08404045B2

    公开(公告)日：2013-03-26

    申请号：US12655826

    申请日：2010-01-08

    申请人： Yoshitaka Kuraoka ,  Shigeaki Sumiya ,  Makoto Miyoshi ,  Minoru Imaeda

    发明人： Yoshitaka Kuraoka ,  Shigeaki Sumiya ,  Makoto Miyoshi ,  Minoru Imaeda

    IPC分类号： C30B21/02

    CPC分类号： C30B29/403 ,  C30B23/02 ,  C30B25/02 ,  C30B25/20 ,  C30B29/406

    摘要： An underlying film 2 of a group III nitride is formed on a substrate 1 by vapor phase deposition. The substrate 1 and the underlying film 2 are subjected to heat treatment in the present of hydrogen to remove the underlying film 2 so that the surface of the substrate 1 is roughened. A seed crystal film 4 of a group III nitride single crystal is formed on a surface of a substrate 1A by vapor phase deposition. A group III nitride single crystal 5 is grown on the seed crystal film 4 by flux method.

    摘要翻译： 通过气相沉积在衬底1上形成III族氮化物的底层膜2。 将基板1和下面的薄膜2在氢气中进行热处理以除去下面的薄膜2，从而使基底1的表面变粗糙。 通过气相沉积在基板1A的表面上形成III族氮化物单晶的晶种膜4。 通过助熔法在晶种膜4上生长III族氮化物单晶5。

    Epitaxial substrate, semiconductor device substrate, and HEMT device
    17.
    发明授权
    Epitaxial substrate, semiconductor device substrate, and HEMT device 有权
    外延衬底，半导体器件衬底和HEMT器件

    公开(公告)号：US07982241B2

    公开(公告)日：2011-07-19

    申请号：US12535859

    申请日：2009-08-05

    申请人： Yoshitaka Kuraoka ,  Makoto Miyoshi ,  Shigeaki Sumiya ,  Mitsuhiro Tanaka

    发明人： Yoshitaka Kuraoka ,  Makoto Miyoshi ,  Shigeaki Sumiya ,  Mitsuhiro Tanaka

    IPC分类号： H01L29/24 ,  H01L29/778

    CPC分类号： H01L29/66462 ,  H01L21/02378 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/0254 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/7787

    摘要： A buffer layer formed of Inx1Aly1Gaz1N formed on a base, with an upper part of the buffer layer containing columnar polycrystalline including a grain boundary existing in a direction substantially perpendicular to a surface of the base. The number of grain boundaries in the lower part of the buffer layer is greater than that in the upper part, and a full width at half maximum of an X-ray rocking curve of the upper part is 300-3000 seconds, RMS of the surface of the buffer layer is 0.2 nm-6 nm, and the ratio of the grain boundary width of the crystal grain of the upper part in a direction parallel to the base surface to the formation thickness of the buffer layer is 0.5-1.5.

    摘要翻译： 由Inx1Aly1Gaz1N形成的缓冲层，其形成在基底上，缓冲层的上部包含柱状多晶，其中包含沿基本上垂直于基底表面的方向存在的晶界。 缓冲层下部的晶粒数大于上部的晶界数，上部的X射线摇摆曲线的半峰全宽为300〜3000秒，表面的RMS为 的缓冲层的面积的比例为0.2nm〜6nm，上部晶粒的与晶面平行的方向的晶界宽度与缓冲层的形成厚度的比率为0.5〜1.5。

    EPITAXIAL SUBSTRATE, SEMICONDUCTOR DEVICE SUBSTRATE, AND HEMT DEVICE
    19.
    发明申请
    EPITAXIAL SUBSTRATE, SEMICONDUCTOR DEVICE SUBSTRATE, AND HEMT DEVICE 有权
    外延衬底，半导体器件衬底和HEMT器件

    公开(公告)号：US20100051961A1

    公开(公告)日：2010-03-04

    申请号：US12535859

    申请日：2009-08-05

    申请人： Yoshitaka Kuraoka ,  Makoto Miyoshi ,  Shigeaki Sumiya ,  Mitsuhiro Tanaka

    发明人： Yoshitaka Kuraoka ,  Makoto Miyoshi ,  Shigeaki Sumiya ,  Mitsuhiro Tanaka

    IPC分类号： H01L29/778 ,  H01L29/24

    CPC分类号： H01L29/66462 ,  H01L21/02378 ,  H01L21/02458 ,  H01L21/02513 ,  H01L21/0254 ,  H01L29/1608 ,  H01L29/2003 ,  H01L29/267 ,  H01L29/7787

    摘要： A buffer layer formed of Inx1Aly1Gaz1N formed on a base, with an upper part of the buffer layer containing columnar polycrystalline including a grain boundary existing in a direction substantially perpendicular to a surface of the base. The number of grain boundaries in the lower part of the buffer layer is greater than that in the upper part, and a full width at half maximum of an X-ray rocking curve of the upper part is 300-3000 seconds, RMS of the surface of the buffer layer is 0.2 nm-6 nm, and the ratio of the grain boundary width of the crystal grain of the upper part in a direction parallel to the base surface to the formation thickness of the buffer layer is 0.5-1.5.

    摘要翻译： 由Inx1Aly1Gaz1N形成的缓冲层，其形成在基底上，缓冲层的上部包含柱状多晶，其中包含沿基本上垂直于基底表面的方向存在的晶界。 缓冲层下部的晶粒数大于上部的晶界数，上部的X射线摇摆曲线的半峰全宽为300〜3000秒，表面的RMS为 的缓冲层的面积的比例为0.2nm〜6nm，上部晶粒的与晶面平行的方向的晶界宽度与缓冲层的形成厚度的比率为0.5〜1.5。