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公开(公告)号:US20080019918A1
公开(公告)日:2008-01-24
申请号:US11662208
申请日:2005-09-07
申请人: Takao Aoki , Shinichi Yamane , Shinichi Kawanami , Yuichi Koyamatsu , Yoshifumi Watanabe , Itaru Hamachi , Ryo Suzuki , Masakazu Koiwa , Nobuo Ida
发明人: Takao Aoki , Shinichi Yamane , Shinichi Kawanami , Yuichi Koyamatsu , Yoshifumi Watanabe , Itaru Hamachi , Ryo Suzuki , Masakazu Koiwa , Nobuo Ida
CPC分类号: A61K49/1839 , A61K47/549 , A61K47/6937 , A61K49/0043 , A61K49/0093 , A61K49/1887
摘要: A pharmaceutical preparation has a ligand structure specifically recognizing a target site and an amphiphilic compound having a hydrophobic or amphiphilic group. The pharmaceutical preparation employs an amphiphilic compound of specific structure obtained by introducing a chained hydrophilic group with an appropriate flexibility, and thus becomes a fine particle suited for drug targeting. The pharmaceutical preparation is expected to give a prolonged pharmacological effect. A particulate preparation exhibiting a remarkable site targeting property can be formed. Further, according to the selection of matrix forming material, the drug releasing property can be controlled.
摘要翻译: 药物制剂具有特异性识别靶位点的配体结构和具有疏水或两亲基团的两亲化合物。 药物制剂使用通过引入具有适当柔性的链状亲水基团而获得的具有特定结构的两亲化合物,从而成为适合于药物靶向的细小颗粒。 药物制剂预期会延长药理作用。 可以形成表现出显着的位置靶向性的微粒制剂。 此外,根据基质形成材料的选择,可以控制药物释放性。
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公开(公告)号:US07746180B2
公开(公告)日:2010-06-29
申请号:US12363156
申请日:2009-01-30
申请人: Shinichi Yamane , Seiji Wantanabe
发明人: Shinichi Yamane , Seiji Wantanabe
IPC分类号: H03L7/00
CPC分类号: H03L7/085 , H03L7/0807 , H03L7/087 , H03L7/0898 , H04L7/0087
摘要: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
摘要翻译: 本发明涉及一种可以减少在数据再现装置中进行初始调整所需的处理时间的锁相环电路和数据再现装置。 在具有两个控制功能(即二进制数据的相位和占空比调整)的数字数据再现装置中,仅通过具有边沿切换装置4的锁相环电路33在相位调整时执行与一个边沿的相位比较 其控制相位比较器1.相位比较器1输入二进制和位同步时钟,并且在一个比较结果与一个边沿之间切换输出,即二值化数据的上升沿或下降沿,以及与 两边。
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公开(公告)号:US20070279134A1
公开(公告)日:2007-12-06
申请号:US11805556
申请日:2007-05-23
申请人: Shinichi Yamane , Seiji Watanabe
发明人: Shinichi Yamane , Seiji Watanabe
IPC分类号: H03L7/08
CPC分类号: H03L7/085 , H03L7/0807 , H03L7/087 , H03L7/0898 , H04L7/0087
摘要: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
摘要翻译: 本发明涉及一种可以减少在数据再现装置中进行初始调整所需的处理时间的锁相环电路和数据再现装置。 在具有两个控制功能的数字数据再现装置中,即用于二值化数据的相位和占空比调整,仅通过具有边沿切换装置4的锁相环电路33在相位调整时执行与一个边沿的相位比较 其控制相位比较器1.相位比较器1输入二进制和位同步时钟,并且在一个比较结果与一个边沿之间切换输出,即二值化数据的上升沿或下降沿,以及与 两边。
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公开(公告)号:US07034622B2
公开(公告)日:2006-04-25
申请号:US10881883
申请日:2004-06-30
申请人: Shinichi Yamane , Seiji Watanabe
发明人: Shinichi Yamane , Seiji Watanabe
IPC分类号: H03L7/00
CPC分类号: H03L7/085 , H03L7/0807 , H03L7/087 , H03L7/0898 , H04L7/0087
摘要: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
摘要翻译: 本发明涉及一种可以减少在数据再现装置中进行初始调整所需的处理时间的锁相环电路和数据再现装置。 在具有两个控制功能(即二进制数据的相位和占空比调整)的数字数据再现装置中,仅通过具有边沿切换装置4的锁相环电路33在相位调整时执行与一个边沿的相位比较 其控制相位比较器1。 相位比较器1输入二进制和位同步时钟,并且在一个比较结果与一个边缘之间切换输出,即二值化数据的上升沿或下降沿,以及两个边沿的比较结果。
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公开(公告)号:US09056805B2
公开(公告)日:2015-06-16
申请号:US13635066
申请日:2011-03-16
申请人: Masateru Ito , Izumi Morita , Shinichi Yamane , Katsushige Yamada
发明人: Masateru Ito , Izumi Morita , Shinichi Yamane , Katsushige Yamada
CPC分类号: C07B63/00 , B01D61/022 , B01D61/025 , B01D61/027 , B01D2311/06 , B01D2311/2646 , C07C29/76 , C12P7/16 , Y02E50/10 , C07C31/12
摘要: Highly pure butanol can be produced by a method for producing butanol, the method comprising: Step A, wherein a butanol-containing solution is filtered through a nanofiltration membrane and a butanol-containing solution is recovered from the permeate side; Step B, wherein the butanol-containing solution obtained in Step A is passed through a reverse osmosis membrane and thereby concentrated to cause two-phase separation into a butanol phase and an aqueous phase; and Step C, wherein butanol is recovered from the butanol phase obtained in Step B.
摘要翻译: 高纯度丁醇可以通过生产丁醇的方法生产,其方法包括:步骤A,其中将含丁醇的溶液通过纳滤膜过滤,从渗透侧回收含丁醇的溶液; 步骤B,其中将步骤A中获得的含丁醇的溶液通过反渗透膜,由此浓缩,使其两相分离成丁醇相和水相; 和步骤C,其中从步骤B中获得的丁醇中回收丁醇。
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公开(公告)号:US20060176089A1
公开(公告)日:2006-08-10
申请号:US11375814
申请日:2006-03-15
申请人: Shinichi Yamane , Seiji Watanabe
发明人: Shinichi Yamane , Seiji Watanabe
IPC分类号: H03L7/06
CPC分类号: H03L7/085 , H03L7/0807 , H03L7/087 , H03L7/0898 , H04L7/0087
摘要: This invention relates to a phase-locked loop circuit and a data reproduction apparatus, which can reduce a processing time that is required for initial adjustment in the data reproduction apparatus. In a digital data reproduction apparatus having two control functions, i.e., phase and duty adjustments for binarized data, the phase comparison with one edge is performed only at the phase adjustment by means of a phase-locked loop circuit 33 having an edge switching means 4 which controls the phase comparator 1. The phase comparator 1 inputs the binarized and a bit synchronous clock, and switches the output between a comparison result with one edge, i.e., a rising edge or a falling edge of binarized data, and a comparison result with both edges.
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公开(公告)号:US4900874A
公开(公告)日:1990-02-13
申请号:US308926
申请日:1989-02-13
CPC分类号: C07C17/00
摘要: A method for producing a fluorine-containing olefin represented by formula (I):Ch.sub.2 .dbd.CFR.sub.f (I)wherein R.sub.f represents a perfluoroalkyl group or a fluoroalkyl group comprising the step of contacting, at a high temperature, hydrogen gas with a 1,1-dihydro-2,2-difluoro alcohol represented by formula (II):HOCH.sub.2 CF.sub.2 R.sub.f (II)wherein R.sub.f represents a perfluoroalkyl group or a fluoroalkyl group.
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