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公开(公告)号：US20210159429A1
公开(公告)日：2021-05-27
申请号：US17168396
申请日：2021-02-05
Inventor： Yuanhui Guo , Chun Wang , Hui Wang , Yisan Zhang
Abstract: The present disclosure provides a light-emitting layer, an organic light emitting diode (OLED) device, and a display apparatus. The light-emitting layer has a host material containing a first photocrosslinker group. A guest material containing a second photocrosslinker group is prepared. The host material and the guest material are mixed in a solvent to form a mixture. The mixture is coated, annealed, and LV-irradiated on a substrate to form the light-emitting layer. As such, the disclosed light-emitting layer is prepared by the polymerization after being on the substrate. The light-emitting layer has a mesh structure. The mesh structure improves energy transfer between the host material and guest material and increases the lifespan of the resultant OLED device and OLED display apparatus.
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公开(公告)号：US10796641B2
公开(公告)日：2020-10-06
申请号：US16335024
申请日：2018-06-21
Applicant: BOE TECHNOLOGY GROUP CO., LTD.
Inventor： Shengji Yang , Xue Dong , Xiaochuan Chen , Hui Wang , Yanming Wang , Minghua Xuan , Pengcheng Lu , Wei Liu , Kuanta Huang
IPC: G09G3/3233 , G09G3/3258 , G09G3/3225
Abstract: The present disclosure provides a pixel unit circuit, a pixel circuit, a driving method and a display device. The pixel unit circuit includes: a light-emitting component with a first terminal coupled with a first voltage input terminal; a storage capacitor module; a driver transistor; a light-emitting control circuit with a control terminal coupled with a light-emitting control line, a first terminal coupled with a second voltage input terminal and a second terminal coupled with a second electrode of the driver transistor, where the light-emitting control circuit is to, under control of the light-emitting control line, control whether the second electrode of the driver transistor is coupled with the second voltage input terminal; a charging compensation control circuit configured to, under control of a gate line, control whether a gate electrode of the driver transistor is coupled with a data line; and a voltage control circuit coupled with the first voltage input terminal and configured to control a voltage value of a first voltage input to the first voltage input terminal.
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公开(公告)号：US20200312244A1
公开(公告)日：2020-10-01
申请号：US16617060
申请日：2019-02-13
Applicant: BOE Technology Group Co., Ltd.
Inventor： Shengji Yang , Xue Dong , Xiaochuan Chen , Hui Wang , Pengcheng Lu
IPC: G09G3/3233 , G09G3/3266 , G09G3/3275
Abstract: Provided are a pixel circuit and a drive method thereof, a display substrate, and a display device. The pixel circuit includes a current source sub-circuit and a voltage divider sub-circuit. The current source sub-circuit is configured to update a stored drive voltage based on a voltage at the data signal terminal when the gate signal terminal receives a gate drive signal, and output a drive current based on the stored drive voltage when the switch signal terminal receives a light-emitting control signal, a current value of the drive current being positively correlated to a voltage value of the drive voltage. The voltage divider sub-circuit is configured to regulate an equivalent resistance value of the voltage divider sub-circuit in an output path of the drive current based on a signal received by the voltage division control signal terminal.
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公开(公告)号：US20200090594A1
公开(公告)日：2020-03-19
申请号：US16390956
申请日：2019-04-22
Inventor： Yifeng Zou , Hui Wang , Qiang Liu
IPC: G09G3/3266 , G09G3/36 , G09G3/3225 , G11C19/28
Abstract: A gate drive circuit, a control method thereof, and a display device are disclosed. The gate drive circuit includes a plurality of cascaded shift registers, and at least one coded control sub-circuit; wherein each stage of the shift registers is configured to transmit a received signal to a next stage of the shift registers and the coded control sub-circuit. The coded control sub-circuit is configured to receive a coded signal, and transmit a voltage at the first voltage terminal or the second voltage terminal to the drive signal output terminal according to a signal output from a shift register coupled to the control sub-circuit under the control of the coded signal.
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115.发明授权公开(公告)号：US10422945B2
公开(公告)日：2019-09-24
申请号：US15576640
申请日：2017-04-26
Inventor： Xiaoming Meng , Hui Wang , Zhiyuan Zheng
Abstract: There are provided a backlight module, a display apparatus and an electronic drawing board. The backlight module includes a light guide plate, a printed circuit board located on a side of the light guide plate facing away from a light exit side thereof and having a wiring protrusion protruding from a surface of the printed circuit board. A shim is disposed between the light guide plate and the printed circuit board and configured to partially compensate a step difference formed due to the wiring protrusion.
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Patent Agency Ranking
公开(公告)号：US10262617B2
公开(公告)日：2019-04-16
申请号：US15744455
申请日：2017-04-21
Abstract: The present invention is related to a gate driving circuit for a display device. The gate driving circuit may comprise x stages of driving shift register units connected in series. Each of the driving shift register units may comprise an input terminal, an output terminal, and a reset terminal. The input terminal may comprise a first input port and a second input port. A row of pixel units driven by the driving shift register unit of the m-th stage may have the same polarity distribution as a row of pixel units driven by the driving shift register unit of the (m−N)-th stage. N is an integer greater than 1. m is an integer and N+1
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公开(公告)号：US20190066617A1
公开(公告)日：2019-02-28
申请号：US15766659
申请日：2017-09-30
Abstract: A shift register unit and a driving method thereof, a gate driving circuit, and an array substrate are provided, and the shift register unit includes: an input sub-circuit connected between a signal input terminal and a pull-up node, an output sub-circuit connected between the pull-up node and a signal output terminal; a reset sub-circuit connected between a reset terminal, the pull-up node and the signal output terminal; and a clock signal selection sub-circuit having input terminals connected to a first clock signal terminal and a second clock signal terminal, and a first output terminal connected to the output sub-circuit, and for selecting to provide either a first clock signal or a second clock signal to the output sub-circuit according to voltage levels at the first control terminal and the second control terminal.
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公开(公告)号：US10095058B2
公开(公告)日：2018-10-09
申请号：US15740121
申请日：2017-05-04
IPC: G11C19/00 , G02F1/133 , G02F1/1343 , G09G3/36 , G11C19/28
Abstract: Embodiments of the present disclosure relate to a shift register and its driving method, a gate driving device and its driving method. The shift register comprises an input module, a reset module, a control module, a pull-up module, a pull-down module, an output gating module and an output pull-down module. The input module can provide an input signal to the pull-up control node according to the input signal. The reset module can provide a first voltage signal to the pull-up control node according to a reset signal. The pull-up module can provide a first clock signal to the cascade node according to the voltage of the pull-up control node. The control module can control the voltage of the pull-down control node according to the second clock signal and the voltage of the pull-up control node.
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119.发明授权公开(公告)号：US09958725B2
公开(公告)日：2018-05-01
申请号：US15097496
申请日：2016-04-13
Inventor： Hui Wang , Chun Wang , Junsheng Chen , Xiaohe Li , Chuncheng Che
IPC: G02F1/1335 , G02F1/1339 , G02F1/1343 , G02F1/1333
CPC classification number: G02F1/133514 , G02F1/133351 , G02F1/133516 , G02F1/1339 , G02F1/13439 , G02F2001/133354
Abstract: A liquid crystal display panel and a manufacturing method thereof, and a motherboard of a liquid crystal display panel are provided. According to the embodiments of the present disclosure, in one aspect, identification patterns are formed in different unit display panel regions of the same exposure region of a motherboard of an array substrate by designing a mask of the array substrate of a liquid crystal display panel, to distinguish the unit display panels exposed in the same batch; in another aspect, the unit display panels exposed in different batches are distinguished through the arrangement modes of the color filters in the unit display panel regions of a motherboard of a color filter substrate, to realize marking of all unit display panels on a same motherboard glass.
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公开(公告)号：US09798181B2
公开(公告)日：2017-10-24
申请号：US14424508
申请日：2014-06-25
Inventor： Hui Wang , Yuanhui Guo , Chun Wang , Junsheng Chen
IPC: G02F1/1333 , G02F1/1335 , G02F1/1339 , G02B5/20
CPC classification number: G02F1/133514 , G02B5/201 , G02F1/133351 , G02F1/133512 , G02F1/1339 , G02F2001/133374
Abstract: The present disclosure provides a display apparatus, comprising an array substrate and a color filter substrate, wherein a black matrix and an alignment film are coated sequentially on a part of an inner surface of the color filter substrate, and wherein another alignment film is coated on a part of an inner surface of the array substrate, and wherein the inner surface of the array substrate has an edge which is adhered by a sealant to an edge of the inner surface of the color filter substrate, and wherein a first marker region for marking unitary display screens in the same batch of exposure is arranged on the inner surface of the array substrate at a source end at the bottom of the display apparatus, and wherein a second marker region for marking unitary display screens in different batches of exposure is arranged inside the bottom of the sealant perpendicular to the array substrate and the color filter substrate and between the array substrate and the color filter substrate. The present disclosure also provides a method for producing a display apparatus. The present invention solves a problem that Panel ID marking process limits the capacity of production and the Panel ID occupies large space in the peripheral regions of the display screens. It improves the capacity of production in the production line efficiently while optimizing the design spaces of the peripheral regions of the display screens.
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