公开(公告)号：US20040195590A1

公开(公告)日：2004-10-07

申请号：US10833080

申请日：2004-04-28

申请人： Semiconductor Energy Laboratory Co., Ltd., a Japan corporation

发明人： Hideomi Suzawa ,  Koji Ono ,  Toru Takayama ,  Tatsuya Arao ,  Shunpei Yamazaki

IPC分类号： H01L031/062

CPC分类号： H01L27/124 ,  H01L21/32136 ,  H01L27/1214 ,  H01L27/127 ,  H01L27/1288 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78684 ,  H01L2029/7863

摘要： There has been a problem that the manufacturing process is complicated and the number of processes is increased when a TFT with an LDD structure or a TFT with a GOLD structure is formed. In a method of manufacturing a semiconductor device, after low concentration impurity regions (24, 25) are formed in a second doping process, a width of the low concentration impurity region which is overlapped with the third electrode (18c) and a width of the low concentration impurity region which is not overlapped with the third electrode can be freely controlled by a fourth etching process. Thus, in a region overlapped with the third electrode, a relaxation of electric field concentration is achieved and then a hot carrier injection can be prevented. And, in the region which is not overlapped with the third electrode, the off-current value can be suppressed.

摘要翻译： 当形成具有LDD结构的TFT或具有GOLD结构的TFT时，存在制造过程复杂并且处理次数增加的问题。 在制造半导体器件的方法中，在第二掺杂工艺中形成低浓度杂质区（24,25）之后，与第三电极（18c）重叠的低浓度杂质区的宽度和 不与第三电极重叠的低浓度杂质区域可以通过第四蚀刻工艺自由地控制。 因此，在与第三电极重叠的区域中，实现电场浓度的松弛，然后可以防止热载流子注入。 并且，在不与第三电极重叠的区域中，可以抑制截止电流值。

公开(公告)号：US06777255B2

公开(公告)日：2004-08-17

申请号：US10282689

申请日：2002-10-29

申请人： Shunpei Yamazaki

发明人： Shunpei Yamazaki

IPC分类号： H01L2100

CPC分类号： H01L27/1214 ,  G02F1/13454 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78627 ,  H01L29/78645 ,  H01L29/78675 ,  H01L2029/7863

摘要： An electro-optical device having high operation performance and reliability, and a manufacturing method thereof. A TFT structure which is strong agains hot carrier injection is realized by disposing a Lov region 207 in an n-channel TFT 203 which forms a driver circuit. Further, Loff regions 217 to 220 and offset region are disposed in an n-channel TFT 304 which forms a pixel section, and a TFT structure of low OFF current value is realized. Further, by reducing the n-type impurity element contained in Loff regions 217 to 220 to approximately 1×1016 to 5×1018 atoms/cm3, further reduction of OFF current can be performed.

摘要翻译： 具有高操作性能和可靠性的电光装置及其制造方法。 通过在形成驱动电路的n沟道TFT 203中设置Lov区207来实现强再次热载流子注入的TFT结构。 此外，在形成像素部的n沟道TFT 304中设置有Loff区域217〜220以及偏移区域，实现了低截止电流值的TFT结构。 此外，通过将Loff区域217至220中包含的n型杂质元素减少至约1×10 16至5×10 18原子/ cm 3，可以进一步减少OFF电流。

公开(公告)号：US06774419B2

公开(公告)日：2004-08-10

申请号：US10198693

申请日：2002-07-16

申请人： Hajime Kimura

发明人： Hajime Kimura

IPC分类号： H01L31062

CPC分类号： H01L27/1255 ,  G02F1/13454 ,  H01L27/0629 ,  H01L27/1214 ,  H01L27/1218 ,  H01L27/1222 ,  H01L27/124 ,  H01L27/1262 ,  H01L27/3262 ,  H01L27/3265 ,  H01L27/3272 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78645 ,  H01L29/78648 ,  H01L2029/7863

摘要： Solved is a problem of attenuation of output amplitude due to a threshold value of a TFT when manufacturing a circuit with TFTs of a single polarity. In a capacitor (105), a charge equivalent to a threshold value of a TFT (104) is stored. When a signal is inputted thereto, the threshold value stored in the capacitor (105) is added to a potential of the input signal. The thus obtained potential is applied to a gate electrode of a TFT (101). Therefore, it is possible to obtain the output having a normal amplitude from an output terminal (Out) without causing the amplitude attenuation in the TFT (101).

摘要翻译： 解决了当制造具有单极性的TFT的电路时由于TFT的阈值而导致的输出幅度衰减的问题。 在电容器（105）中，存储与TFT（104）的阈值相当的电荷。 当输入信号时，将存储在电容器（105）中的阈值加到输入信号的电位上。 由此获得的电位被施加到TFT（101）的栅电极。 因此，可以从输出端子（Out）获得具有正常振幅的输出，而不会导致TFT（101）中的振幅衰减。

公开(公告)号：US06773944B2

公开(公告)日：2004-08-10

申请号：US10287588

申请日：2002-11-05

申请人： Satoru Okamoto

发明人： Satoru Okamoto

IPC分类号： H01L2100

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78675 ,  H01L2029/7863

摘要： A semiconductor device is provided which is constituted by semiconductor devices including a thin film transistor with a GOLD structure, the GOLD structure thin film transistor being such that: a semiconductor layer, a gate insulating film, and a gate electrode are formed in lamination from the side closer to a substrate; the gate electrode is constituted of a first-layer gate electrode and a second-layer gate electrode shorter in the size than the first-layer gate electrode; the first-layer gate electrode corresponding to the region exposed from the second-layer gate electrode is formed into a tapered shape so as to be thinner toward the end portion; a first impurity region is formed in the semiconductor layer corresponding to the region with the tapered shape; and a second impurity region having the same conductivity as the first impurity region is formed in the semiconductor layer corresponding to the outside of the first-layer gate electrode, which is characterized in that a dry etching process consisting of one step or two steps is applied to the formation of the gate electrode.

摘要翻译： 提供一种半导体器件，其由包括具有GOLD结构的薄膜晶体管的半导体器件构成，所述GOLD结构薄膜晶体管使得：半导体层，栅极绝缘膜和栅极电极从 更靠近基底; 栅电极由比第一层栅极电极短的第一层栅电极和第二层栅极电极构成; 对应于从第二层栅电极露出的区域的第一层栅电极形成为朝向端部较薄的锥形形状; 在对应于具有锥形形状的区域的半导体层中形成第一杂质区; 并且在与第一层栅电极的外侧对应的半导体层中形成具有与第一杂质区相同的导电性的第二杂质区，其特征在于，施加由一步或两步构成的干蚀刻工艺 以形成栅电极。

公开(公告)号：US06743649B2

公开(公告)日：2004-06-01

申请号：US10337704

申请日：2003-01-07

申请人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

发明人： Shunpei Yamazaki ,  Hideomi Suzawa ,  Koji Ono ,  Yasuyuki Arai

IPC分类号： H01L2100

CPC分类号： H01L27/1222 ,  G02F1/13454 ,  H01L21/32136 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/127 ,  H01L27/1277 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L29/78627 ,  H01L29/78645 ,  H01L2029/7863

摘要： By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.

公开(公告)号：US06737304B2

公开(公告)日：2004-05-18

申请号：US09972859

申请日：2001-10-10

申请人： Shunpei Yamazaki ,  Jun Koyama ,  Hidehito Kitakado

发明人： Shunpei Yamazaki ,  Jun Koyama ,  Hidehito Kitakado

IPC分类号： H01L21265

CPC分类号： H01L27/127 ,  H01L27/1214 ,  H01L27/1274 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78627 ,  H01L2029/7863

摘要： A semiconductor device having high operating performance and reliability is disclosed, and its fabrication process is also disclosed. In an n-channel type TFT 302, an Lov region 207 is disposed, whereby a TFT structure highly resistant to hot carriers is realized. Further, in an n-channel type TFT 304 forming a pixel portion, Loff regions 217 to 220 are disposed, whereby a TFT structure having a low OFF-current value is realized. In this case, in the Lov region, the n-type impurity element exists at a concentration higher than that of the Loff regions, and the whole of the n-type impurity region (b) which constitutes the Lov region is sufficiently activated by optical annealing, so that a good junction portion is formed between the n-type impurity region and the channel forming region.

摘要翻译： 公开了具有高操作性能和可靠性的半导体器件，并且还公开了其制造工艺。在n沟道型TFT 302中，设置有Lov区域207，由此实现了对热载流子具有高耐受性的TFT结构。 此外，在形成像素部的n沟道型TFT304中，设置Loff区域217〜220，由此实现具有低截止电流值的TFT结构。 在这种情况下，在Lov区域中，n型杂质元素以比Loff区域高的浓度存在，构成Lov区域的n型杂质区域（b）全部被光学 退火，使得在n型杂质区域和沟道形成区域之间形成良好的接合部分。

公开(公告)号：US20040087125A1

公开(公告)日：2004-05-06

申请号：US10603944

申请日：2003-06-26

发明人： Shigeharu Monoe

IPC分类号： H01L021/3205 ,  H01L021/4763

CPC分类号： H01L29/78696 ,  H01L21/76838 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/78621 ,  H01L2029/7863

摘要： A gate electrode is formed of a laminate structure comprising a plurality of conductive layers such that the width along the channel of a lower first conductive layer is larger than that of an upper second conductive layer. The gate electrode is used as a mask during ion doping for forming an LDD. A mask pattern for forming the gate electrode is processed into an optimum shape in combination with dry etching so that the LDD overlapping with the gate electrode (Lov) is 1 nullm or more, and preferably, 1.5 nullm or more.

摘要翻译： 栅电极由包括多个导电层的层压结构形成，使得沿着第一下导电层的沟道的宽度大于上第二导电层的宽度。 在用于形成LDD的离子掺杂期间，栅电极用作掩模。 用于形成栅电极的掩模图案与干蚀刻结合处理成最佳形状，使得与栅电极（Lov）重叠的LDD为1μm或更大，优选为1.5μm或更大。

公开(公告)号：US06713323B2

公开(公告)日：2004-03-30

申请号：US10058158

申请日：2002-01-29

申请人： Shunpei Yamazaki ,  Osamu Nakamura ,  Takashi Hamada ,  Satoshi Murakami

发明人： Shunpei Yamazaki ,  Osamu Nakamura ,  Takashi Hamada ,  Satoshi Murakami

IPC分类号： H01L21339

CPC分类号： H01L29/42384 ,  H01L27/12 ,  H01L27/1277 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78624 ,  H01L29/78627 ,  H01L2029/7863

摘要： A semiconductor device is manufactured by a method in which the number of heat treatments at a high temperature (600° C. or higher) is reduced to thereby achieve a process at a low temperature (600° C. or lower), and a simplified process and improvement in throughput are realized. An impurity region to which a rare gas element (also called a rare gas) is added is formed on a semiconductor film of a crystalline structure by using a mask. Gettering is performed in such a manner that a metallic element contained in the semiconductor film is caused to segregate in the impurity region by heat treatment. The impurity region is thereafter used as a source or drain region.

摘要翻译： 通过如下方法制造半导体器件：在高温（600℃以上）下进行热处理的数量减少，从而达到低温（600℃以下）的工序，简化了 实现了吞吐量的处理和改进。 通过使用掩模，在结晶结构的半导体膜上形成添加稀有气体元素（也称为稀有气体）的杂质区域。 以使得包含在半导体膜中的金属元素通过热处理在杂质区域中分离的方式进行吸气。 此后，杂质区域用作源区或漏区。

公开(公告)号：US20030234424A1

公开(公告)日：2003-12-25

申请号：US10413985

申请日：2003-04-15

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Hideomi Suzawa ,  Akira Tsunoda

IPC分类号： H01L021/00 ,  H01L027/01 ,  H01L031/0392

CPC分类号： H01L27/1288 ,  G02F1/13454 ,  H01L27/1108 ,  H01L27/1214 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78627 ,  H01L2029/7863

摘要： There is provided a structure of a pixel TFT (n-channel type TFT) in which an off current value is sufficiently low. In impurity regions, a concentration distribution of an impurity element imparting one conductivity type is made to have a concentration gradient, the concentration is made low at a side of a channel formation region, and the concentration is made high at the side of an end portion of a semiconductor layer.

公开(公告)号：US20030157754A1

公开(公告)日：2003-08-21

申请号：US10287985

申请日：2002-11-05

申请人： Semiconductor Energy Laboratory Co., Ltd.

发明人： Shunpei Yamazaki ,  Taketomi Asami ,  Hidehito Kitakado ,  Yasuyuki Arai

IPC分类号： H01L021/00 ,  C30B001/00 ,  H01L021/84 ,  H01L021/20 ,  H01L021/31 ,  H01L021/36 ,  H01L021/469

CPC分类号： H01L27/127 ,  G02F1/133345 ,  G02F1/13454 ,  G02F1/1362 ,  H01L21/3003 ,  H01L21/3144 ,  H01L21/3145 ,  H01L27/1214 ,  H01L27/124 ,  H01L29/42384 ,  H01L29/4908 ,  H01L29/66757 ,  H01L29/66765 ,  H01L29/78621 ,  H01L29/78627 ,  H01L2029/7863

摘要： A hydrogenation method that utilizes plasma directly exposes a crystalline semiconductor film to the plasma, and therefore involves the problem that the crystalline semiconductor film is damaged by the ions generated simultaneously in the plasma. If a substrate is heated to 400null C. or above to recover this damage, hydrogen is re-emitted from the crystalline semiconductor film. To solve these problems, a method of fabricating a semiconductor device according to the present invention comprises the steps of forming a hydrogen-containing first insulating film on a semiconductor layer formed into a predetermined shape, conducting heat-treatment in a hydrogen atmosphere or in an atmosphere containing hydrogen formed by plasma generation, forming a second insulating film in contact with the first insulating film, conducting heat-treatment in a hydrogen atmosphere or in an atmosphere containing hydrogen formed by plasma generation, forming a hydrogen-containing third insulating film on the second insulating film and conducting heat-treatment in an atmosphere containing hydrogen or nitrogen.

摘要翻译： 使用等离子体的氢化方法直接将结晶半导体膜暴露在等离子体中，因此存在结晶半导体膜被等离子体中同时产生的离子损坏的问题。 如果将衬底加热至400℃以上以恢复该损伤，则从结晶半导体膜再次发射氢。 为了解决这些问题，根据本发明的制造半导体器件的方法包括以下步骤：在形成为预定形状的半导体层上形成含氢的第一绝缘膜，在氢气氛中或在氢气氛中进行热处理 包含通过等离子体生成形成的氢气的气氛，形成与第一绝缘膜接触的第二绝缘膜，在氢气氛或含有通过等离子体产生形成的氢气的气氛中进行热处理，在其上形成含氢的第三绝缘膜 第二绝缘膜，并在含有氢气或氮气的气氛中进行热处理。