公开(公告)号：US20230146528A1

公开(公告)日：2023-05-11

申请号：US17421264

申请日：2021-01-11

Applicant: BOE Technology Group Co., Ltd.

Inventor： Ying HAN ,  Yicheng LIN ,  Ling WANG ,  Pan XU ,  Guoying WANG ,  Xing ZHANG

IPC: G09G3/3208 ,  H10K59/65

CPC classification number: G09G3/3208 ,  H10K59/65 ,  G09G2360/145 ,  G09G2300/0426 ,  G09G2320/02 ,  H10K59/12

Abstract: A display substrate, a display panel, and a display device are provided. The display substrate includes a substrate, a plurality of sub-pixels located on the substrate, a plurality of driving circuits and a plurality of light sensors, an orthographic projection of the light sensors on the substrate is within a range of an orthographic projection of the driving circuits on the substrate.

公开(公告)号：US20230122411A1

公开(公告)日：2023-04-20

申请号：US17914466

申请日：2021-11-19

Applicant: Hefei BOE Joint Technology Co.,Ltd. ,  BOE Technology Group Co., Ltd.

Inventor： Can YUAN ,  Yongqian LI ,  Zhidong YUAN ,  Pan XU

IPC: H10K59/131 ,  G09G3/3266 ,  H10K59/121 ,  H10K59/126 ,  H10K50/824 ,  H10K50/813

Abstract: The present disclosure provides an array substrate and a display device. The array substrate includes a base substrate and a scan line, a data line, a power supply line, a sensing line, a pixel driving circuit and a light-emitting unit that are sequentially stacked on the base substrate. The array substrate also includes a gate layer, a first conductive layer, a second conductive layer, and a third conductive layer. The first electrode of the storage capacitor is at least disposed at the first conductive layer, and the second electrode of the storage capacitor is at least disposed at the second conductive layer. The data line, the power supply line, and the sensing line are disposed at the third conductive layer.

公开(公告)号：US20230087701A1

公开(公告)日：2023-03-23

申请号：US17613691

申请日：2021-02-20

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guoying WANG ,  Pan XU ,  Yicheng LIN ,  Ying HAN ,  Xing ZHANG ,  Zhen SONG ,  Dacheng ZHANG

IPC: H10K59/131

Abstract: Provided is a display panel, including: a substrate provided with a display region and a non-display region disposed at a periphery of the display region; a plurality of first power signal lines and a plurality of drive signal lines that are disposed in the display region; and a power connection bus, a plurality of first fan-out leads, and a plurality of second fan-out leads that are disposed in the non-display region, wherein the power connection bus is electrically connected to the first power signal line and the first fan-out lead respectively; the plurality of second fan-out leads are electrically connected to the plurality of drive signal lines in a one-to-one correspondence; each first fan-out lead is disposed between every two adjacent second fan-out leads; and the plurality of first fan-out leads and the plurality of second fan-out leads are both configured to be electrically connected to a driving chip.

公开(公告)号：US20230086927A1

公开(公告)日：2023-03-23

申请号：US17908021

申请日：2021-09-17

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ying HAN ,  Xuehuan FENG ,  Yicheng LIN ,  Pan XU ,  Guoying WANG ,  Xing ZHANG ,  Zhan GAO ,  Mingi CHU

IPC: G09G3/3266 ,  G11C19/28 ,  G09G3/3275 ,  H10K59/131 ,  H10K59/121 ,  H01L27/12

Abstract: A display panel includes: a substrate, sub-pixels and a gate drive circuit. The sub-pixel includes a pixel drive circuit. The gate drive circuit includes cascaded shift registers, and a shift register is electrically connected to pixel drive circuits in a row of sub-pixels. The gate drive circuit further includes cascade input signal lines and cascade display reset signal lines. The cascade input signal line is configured to connect a shift signal terminal and an input signal terminal of two different shift register, and the cascade display reset signal line is configured to connect a shift signal terminal and a display reset signal terminal of two different shift register. The display panel has sub-pixel regions for arranging the sub-pixels and first gap regions each located between two adjacent columns of sub pixel regions: the cascade display reset signal lines and the cascade input signal lines are disposed in different first gap regions.

公开(公告)号：US20220406252A1

公开(公告)日：2022-12-22

申请号：US17620195

申请日：2020-12-23

Applicant: Hefei BOE Joint Technology Co., Ltd. ,  BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Xuehuan FENG ,  Yongqian LI ,  Pan XU ,  Zhongyuan WU

IPC: G09G3/3233 ,  G09G3/3266

Abstract: A pixel circuit array, a display panel, a method for driving a pixel circuit array, and a method for driving a display panel are provided. The pixel circuit array may include: a first signal sensing line (SENSE1) and a second signal sensing line (SENSE2); and N pixel circuits arranged in a column. All of the N pixel circuits are divided into a first group and a second group, each pixel circuit in the first group is coupled to the first signal sensing line (SENSE1), and each pixel circuit in the second group is coupled to the second signal sensing line (SENSE2) different from the first signal sensing line (SENSE1), where N is a positive integer greater than 1.

公开(公告)号：US20220392993A1

公开(公告)日：2022-12-08

申请号：US17789153

申请日：2021-08-12

Applicant: BOE Technology Group Co., Ltd.

Inventor： Guoying WANG ,  Yicheng LIN ,  Ying HAN ,  Mingi CHU ,  Pan XU ,  Xing ZHANG

IPC: H01L27/32

Abstract: Provided in the present disclosure are a display substrate and a display device. In the display substrate, at least a portion of a cathode is located in a display region; at least one driver chip is located in a non-display region; a first power supply signal line pattern is located in the non-display region and arranged on at least one side of the display region. The first power supply signal line pattern comprises a first transmission portion and a first wire inlet portion electrically connected to the first transmission portion. The first transmission portion extends in a first direction, and is electrically connected to the cathode. The first wire inlet portion extends in a second direction intersecting with the first direction. The first wire inlet portion is electrically connected to the at least one driver chip.

公开(公告)号：US20220384558A1

公开(公告)日：2022-12-01

申请号：US17771659

申请日：2021-06-15

Applicant: BOE Technology Group Co., Ltd.

Inventor： Pan XU ,  Dacheng ZHANG ,  Yicheng LIN ,  Yongqian LI

IPC: H01L27/32

Abstract: The present disclosure provides a display substrate and a display apparatus. The display substrate has a display region, and the display substrate includes a base substrate and a plurality of gate lines and a plurality of data lines on the base substrate; the plurality of gate lines and the plurality of data lines are arranged to cross each other to define a plurality of pixel regions, and a pixel unit is arranged in a pixel region of the plurality of pixel regions; each pixel unit includes a thin-film transistor and a light-emitting device in the display region; the display substrate further comprises a plurality of fan-out traces in the display region, wherein each fan-out trace of the plurality of fan-out traces is electrically connected to a data line corresponding to the fan-out trace, and is arranged in a different layer from the date lines and the gate lines.

公开(公告)号：US20220320204A1

公开(公告)日：2022-10-06

申请号：US17512380

申请日：2021-10-27

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Guoying WANG ,  Pan XU ,  Xing ZHANG ,  Ying HAN ,  Zhan GAO ,  Zhen SONG

IPC: H01L27/32 ,  H01L51/56 ,  H01L51/52

Abstract: The present disclosure provides a display substrate, a display device and a manufacturing method thereof. The display substrate includes a first substrate, a pixel defining layer on the first substrate and including a plurality of sub-pixel openings, and at least one recess on a side of the display substrate away from the first substrate. An orthographic projection of the at least one recess on the first substrate and orthographic projections of the plurality of sub-pixel openings on the first substrate do not overlap.

公开(公告)号：US20210167155A1

公开(公告)日：2021-06-03

申请号：US16063774

申请日：2017-12-18

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Pan XU ,  Yongqian LI ,  Zhidong YUAN ,  Zhenfei CAI ,  Can YUAN ,  Meng LI

IPC: H01L27/32 ,  H01L29/786 ,  H01L51/52 ,  H01L29/40

Abstract: A thin-film transistor includes a substrate, and a light-shielding layer and an active layer sequentially over the substrate. The light-shielding layer has an accommodating space having a bottom wall and a side wall on an upper surface thereof. An orthographic projection of the active layer on the substrate is contained within an orthographic projection of the accommodating space of the light-shielding layer on the substrate. An upper side of the side wall of the accommodating space of the light-shielding layer has a larger distance to the substrate than a bottom surface, and optionally has an equal or larger distance to the substrate than a top surface, of the active layer. The light-shielding layer can comprise a gate electrode. As such, lights from an underneath and from a lateral side of the thin-film transistor that otherwise reach the active layer can be partially or completely blocked.

公开(公告)号：US20210083137A1

公开(公告)日：2021-03-18

申请号：US16633372

申请日：2019-07-23

Applicant: BOE TECHNOLOGY GROUP CO., LTD.

Inventor： Ling WANG ,  Yicheng LIN ,  Cuili GAI ,  Pan XU ,  Guoying WANG

IPC: H01L31/103 ,  H01L31/0224 ,  H01L31/18 ,  H01L27/146

Abstract: The present disclosure provides an optoelectronic sensor and a manufacturing method thereof, and an optoelectronic device and a manufacturing method thereof. The optoelectronic sensor includes a first electrode, a first semiconductor layer, a second semiconductor layer and a second electrode arranged in a stack, wherein each of the first semiconductor layer and the second semiconductor layer is a metal oxide semiconductor layer, the first electrode is a transparent electrode and has a work function greater than that of the first semiconductor layer; and the first semiconductor layer has a conductivity smaller than that of the second semiconductor layer, and has a work function greater than that of the second semiconductor layer.