Ultra thin and flexible SCSI cable and method for making the same
    91.
    发明授权
    Ultra thin and flexible SCSI cable and method for making the same 有权
    超薄且灵活的SCSI电缆及其制造方法

    公开(公告)号:US6124551A

    公开(公告)日:2000-09-26

    申请号:US299688

    申请日:1999-04-26

    IPC分类号: H01B11/02

    CPC分类号: H01B11/02

    摘要: A SCSI external cable for interconnecting external peripheral devices to a host computer system or other peripheral devices is provided. The SCSI cable is configured to be ultra-thin and flexible and is designed to handle high bandwidths and support longer cabling distances, relative to conventional SCSI cabling. The SCSI cable includes: (a) an inner non-conducting fiber; (b) a first layer of twisted pairs, each of the first layer twisted pairs being concentrically wrapped around the inner non-conducting fiber; (c) a second layer of twisted pairs, each of the second layer twisted pairs being concentrically wrapped around the first layer of twisted pairs; (d) an inner shield being concentrically wrapped in a first direction around the second layer of twisted pairs, the inner shield being in the form of a tape strip; (e) an outer shield being concentrically wrapped in a second direction around the inner shield, the second direction being opposite the first direction of the inner shield, and the outer shield is in the form of a plurality of flat copper filaments, the plurality of flat copper filaments provide the SCS external cable an increased degree of flexibility; and (f) a jacket configured to wrap around the outer shield. In one example, a separator can be wrapped around the second layer of twisted pairs, and before the inner shield, to assist in meeting the SCSI electrical requirements. In another example where the separator is not used, it is preferred that each wire in the first layer and the second layer has a respective first layer insulation and a second layer insulation, and the second layer insulation is configured to be thicker than the first layer insulation.

    摘要翻译: 提供用于将外部外围设备与主机系统或其他外围设备互连的SCSI外部电缆。 SCSI电缆被配置为超薄和灵活,并且被设计为相对于常规SCSI布线来处理高带宽并且支持更长的布线距离。 SCSI电缆包括:(a)内部非导电纤维; (b)第一层双绞线,每个第一层双绞线同心地缠绕在内部非导电纤维周围; (c)第二层双绞线,每个第二层双绞线同心地缠绕在第一层双绞线上; (d)围绕所述第二双绞线层的第一方向同心地缠绕内屏蔽,所述内屏蔽是带状的形式; (e)围绕所述内屏蔽体沿第二方向同心地包裹的外屏蔽件,所述第二方向与所述内屏蔽件的所述第一方向相反,并且所述外屏蔽件为多个扁平铜丝的形式,所述多个 扁铜丝为SCS外部电缆提供了更高的灵活性; 和(f)构造成围绕外护罩缠绕的护套。 在一个示例中,分离器可以围绕第二层双绞线缠绕,并且在内部屏蔽之前被缠绕以帮助满足SCSI电气要求。 在不使用隔膜的另一个例子中,优选地,第一层和第二层中的每个线具有相应的第一层绝缘层和第二层绝缘层,并且第二层绝缘体构造成比第一层厚 绝缘。

    Bus termination circuitry and methods for implementing the same
    92.
    发明授权
    Bus termination circuitry and methods for implementing the same 失效
    总线终端电路及其实现方法

    公开(公告)号:US6122689A

    公开(公告)日:2000-09-19

    申请号:US78346

    申请日:1998-05-13

    申请人: Peter K. Cheung

    发明人: Peter K. Cheung

    IPC分类号: G06F13/40 G06F13/00

    CPC分类号: G06F13/4086

    摘要: Disclosed is a host adapter having automatic termination, and a method for implementing the automatic termination. The host adapter includes a first connector for connecting to at least one external peripheral device and a second connector for connecting to at least one internal peripheral device. The host adapter further includes a termination system circuit that is coupled between the first connector and the second connector. The termination system circuit is configured to produce bit data that is indicative of whether a peripheral device is coupled to one or both of the first connector and the second connector. Preferably, the termination system circuit communicates the bit data to a software termination engine upon boot-up to enable or disable a termination of the host adapter. Furthermore, the termination system circuit includes a termination control decoder and a tri-state buffer. The host adapter also includes a termination over-ride control that is configured to over-ride the automatic termination generated by the termination system circuit via a software control.

    摘要翻译: 公开了具有自动终止的主机适配器和实现自动终端的方法。 主机适配器包括用于连接至少一个外部外围设备的第一连接器和用于连接至少一个内部外围设备的第二连接器。 主机适配器还包括耦合在第一连接器和第二连接器之间的终端系统电路。 终端系统电路被配置为产生指示外围设备是否耦合到第一连接器和第二连接器中的一个或两者的位数据。 优选地,终端系统电路在启动时将位数据传送到软件终端引擎,以启用或禁用主机适配器的终止。 此外,终端系统电路包括终端控制解码器和三态缓冲器。 主机适配器还包括终止覆盖控制,其被配置为通过软件控制覆盖终端系统电路产生的自动终端。

    High-speed serial data cable with improved electromagnetic performance
    93.
    发明授权
    High-speed serial data cable with improved electromagnetic performance 失效
    具有改善电磁性能的高速串行数据线

    公开(公告)号:US6109971A

    公开(公告)日:2000-08-29

    申请号:US887349

    申请日:1997-07-02

    摘要: The present inventions provide a high-speed serial data cable assembly with improved electromagnetic performance. In one embodiment, the high-speed serial data cable assembly includes a first connector, a second connector, a cable portion, and a capacitor. The first connector includes a conductive housing and a first plurality of pins, one of the first plurality of the pins being a ground pin. The second connector includes a conductive housing and a second plurality of pins. The cable portion includes a shield, the cable portion electrically coupling the first plurality of pins to the second plurality of pins, and the shield electrically coupling the ground pin of the first connector to the conductive housing of the second connector. The capacitor electrically couples the conductive housing of the first connector to the shield, wherein the capacitor allows a current to flow from the shield to the conductive housing of the first connector when data is being transmitted through the cable portion at frequencies corresponding to the capacitor. In another embodiment of the present invention, the high-speed serial data cable assembly also includes a toroid disposed around the cable portion, such that the electromagnetic emissions of the high-speed serial data cable assembly is further reduced during the transmission of data. A method of manufacturing a high-speed serial data cable assembly with improved electromagnetic performance is further disclosed.

    摘要翻译: 本发明提供了具有改进的电磁性能的高速串行数据电缆组件。 在一个实施例中,高速串行数据电缆组件包括第一连接器,第二连接器,电缆部分和电容器。 第一连接器包括导电外壳和第一多个引脚,第一多个引脚中的一个是接地引脚。 第二连接器包括导电壳体和第二多个销。 电缆部分包括屏蔽,电缆部分将第一组多个引脚电耦合到第二组引脚,并且屏蔽将第一连接器的接地引脚电连接到第二连接器的导电壳体。 电容器将第一连接器的导电外壳电耦合到屏蔽件,其中当数据以对应于电容器的频率通过电缆部分传输时,电容器允许电流从屏蔽件流过第一连接器的导电外壳。 在本发明的另一实施例中,高速串行数据电缆组件还包括设置在电缆部分周围的环形线圈,使得在数据传输期间进一步降低高速串行数据电缆组件的电磁发射。 进一步公开了一种制造具有改进的电磁性能的高速串行数据电缆组件的方法。

    Method for selectively booting from a desired peripheral device
    94.
    发明授权
    Method for selectively booting from a desired peripheral device 失效
    从期望的外围设备选择性地引导的方法

    公开(公告)号:US6105130A

    公开(公告)日:2000-08-15

    申请号:US16764

    申请日:1998-01-30

    IPC分类号: G06F9/445

    CPC分类号: G06F9/4408

    摘要: Disclosed is a method for booting a computer system. The computer system includes a first device and a second device which, during initialization of the computer system, are each respectively automatically associated with a unique identification used in a computer generated request to indicate whether the first device or the second device is to respond to the computer generated request. The method includes the act modifying each unique identification that is associated with the first device and the second device of the computer system. In this manner, the second device responds to the computer generated request for the first device, and the first device responds to the computer generated request for the second device.

    摘要翻译: 公开了一种用于引导计算机系统的方法。 计算机系统包括第一设备和第二设备,其在计算机系统的初始化期间各自分别自动地与在计算机生成的请求中使用的唯一标识相关联,以指示第一设备或第二设备是否响应于 计算机生成请求。 该方法包括修改与计算机系统的第一设备和第二设备相关联的每个唯一标识的动作。 以这种方式,第二设备响应计算机生成的对第一设备的请求,并且第一设备响应计算机生成的第二设备的请求。

    Scatter gather memory system for a hardware accelerated command
interpreter engine
    95.
    发明授权
    Scatter gather memory system for a hardware accelerated command interpreter engine 失效
    散射采集内存系统,用于硬件加速命令解释器引擎

    公开(公告)号:US06105075A

    公开(公告)日:2000-08-15

    申请号:US83569

    申请日:1998-05-22

    申请人: Bahareh Ghaffari

    发明人: Bahareh Ghaffari

    摘要: A hardware accelerated memory system in a hardware accelerated I/O data processing engine that gathers and maintains pointers to a set of widely distributed source and/or destination data locations. The locations of the source and/or destination data locations operated on by the I/O data processing engine can include a memory local to the command interpreter and a memory remote from but accessible to the command interpreter by way of an I/O bus. Each source and/or destination scatter/gather list contains pointers to actual data locations that are either in a memory local to the command interpreter or a memory remote from the command interpreter but accessible by way of an interconnecting I/O bus. Each data location entry in a scatter/gather list is also accompanied by a byte count indicative of the total number of bytes at a given data location.

    摘要翻译: 在硬件加速I / O数据处理引擎中的硬件加速存储器系统,其收集并维护指向一组广泛分布的源和/或目的地数据位置的指针。 由I / O数据处理引擎操作的源和/或目的地数据位置的位置可以包括命令解释器本地的存储器和远程但通过I / O总线可访问命令解释器的存储器。 每个源和/或目标分散/收集列表包含指向命令解释器本地的存储器中的实际数据位置的指针或远离命令解释器的存储器,但可通过互连I / O总线访问。 分散/收集列表中的每个数据位置条目也伴随有指示给定数据位置处的总字节数的字节数。

    Mechanism for incremental backup of on-line files
    96.
    发明授权
    Mechanism for incremental backup of on-line files 失效
    在线文件增量备份的机制

    公开(公告)号:US6101585A

    公开(公告)日:2000-08-08

    申请号:US963905

    申请日:1997-11-04

    IPC分类号: G06F12/16

    摘要: A backup mechanism enables incremental backup operations for on-line files of a computer system having an archive bit attribute associated with each file. The mechanism comprises an archive bit change number (ABCN) attribute that is also associated with each file and that is manipulated by a file system of the computer to reflect a correct value of the archive bit when the file is modified during a current backup operation. The ABCN attribute is incremented each time the file is modified to ensure that the file is accurately copied to secondary backup storage during a subsequent incremental backup operation. The mechanism thus enables reliable on-line file modifications which, in turn, substantially increases the efficiency of the computer system.

    摘要翻译: 备份机制允许具有与每个文件相关联的归档位属性的计算机系统的在线文件的增量备份操作。 该机制包括与每个文件相关联并由计算机的文件系统操纵的归档位改变数(ABCN)属性,以在当前备份操作期间修改文件时反映归档位的正确值。 每次修改文件时,ABCN属性都会增加,以确保在后续增量备份操作期间将文件准确地复制到辅助备份存储。 因此,该机制使得能够进行可靠的在线文件修改,这进而显着提高了计算机系统的效率。

    Write synchronization system on a headerless format magnetic disk device
    97.
    发明授权
    Write synchronization system on a headerless format magnetic disk device 失效
    在无头格式磁盘设备上写入同步系统

    公开(公告)号:US6084739A

    公开(公告)日:2000-07-04

    申请号:US829432

    申请日:1997-03-31

    摘要: A write synchronization system in a headerless format magnetic disk device. The system transmits encoded synchronization signals containing disk administration information such as servo burst information between a servo controller and other disk controller components such as a hard disk controller and a microprocessor or digital signal processor. The servo controller interprets the disk administration information read from the magnetic disk and sends an encoded signal to the other disk controller components for each servo burst encountered on when reading the disk. The disk administration information in the signals can be verified by comparing the contents of a present signal to the contents of at least one previous signal to determine if a servo burst from a sequence of servo bursts has been missed. A missing servo burst can also be identified by measuring the time interval between signals from the servo controller.

    摘要翻译: 一种写头同步系统,以无头格式磁盘装置。 该系统在伺服控制器和诸如硬盘控制器和微处理器或数字信号处理器的其它盘控制器组件之间传送包含诸如伺服脉冲串信息之类的盘管理信息的编码同步信号。 伺服控制器解读从磁盘读取的磁盘管理信息,并在读取磁盘时遇到的每个伺服突发信号向其它磁盘控制器组件发送编码信号。 可以通过将当前信号的内容与至少一个先前信号的内容进行比较来确定信号中的盘管理信息,以确定是否错过了来自伺服脉冲序列的伺服脉冲串。 也可以通过测量来自伺服控制器的信号之间的时间间隔来识别丢失的伺服脉冲串。

    Fault tolerant multiple client memory arbitration system capable of
operating multiple configuration types
    99.
    发明授权
    Fault tolerant multiple client memory arbitration system capable of operating multiple configuration types 失效
    容错多客户端内存仲裁系统,能够运行多种配置类型

    公开(公告)号:US6065102A

    公开(公告)日:2000-05-16

    申请号:US965718

    申请日:1997-11-07

    IPC分类号: G06F12/08 G06F13/16 G06F13/18

    摘要: A multiple client memory arbitration system supporting simultaneous arbitration access to a local cache memory and a remote cache memory for mirrored write operations to both the local cache memory and the remote cache memory by one of a local arbitration device or a remote cache memory at a time. The enhanced arbitration system includes active/active failover control by a surviving one of the local arbitration device or the remote arbitration device that have participated in the mirrored write operations between the respective local cache memory and the remote cache memory.

    摘要翻译: 多个客户端存储器仲裁系统,一次支持本地高速缓冲存储器和远程高速缓冲存储器的同时仲裁访问到本地高速缓冲存储器和远程高速缓冲存储器,以用于本地高速缓冲存储器和远程高速缓冲存储器的镜像写入操作 。 增强的仲裁系统包括本地仲裁设备或参与在各自的本地高速缓冲存储器和远程高速缓冲存储器之间的镜像写入操作的远程仲裁设备中的幸存的一个的主动/主动故障切换控制。

    Timer using a single counter to track multiple time-outs
    100.
    发明授权
    Timer using a single counter to track multiple time-outs 失效
    定时器使用单个计数器来跟踪多个超时

    公开(公告)号:US6002737A

    公开(公告)日:1999-12-14

    申请号:US89054

    申请日:1998-06-02

    IPC分类号: G06F1/14 G07C3/00

    CPC分类号: G06F1/14

    摘要: A circuit such as a host adapter includes a timer capable of detecting time-outs for multiple pending commands. The timer includes a single free-running counter, a first storage for start counts, a second storage for time-out values, a subtractor, and a comparator. The start counts are counts from the counter that are saved when issuing an associated command. The time-out values indicate the lengths of different types of time-out periods. To check whether a command timed out, a start count associated with the command is selected from the first storage, and the subtractor determines a difference between a current count in the counter and the selected start count. The difference is then compared to a time-out value that is selected from the second storage according to the type of time-out. The command timed out if the difference is greater than the selected time-out value. In one embodiment, the second storage includes count registers for time-out values, a multiplexer, and select register that provides a select signal to the multiplexer. The select register contains a value associated with the command, and the number of count registers matches the number of types of time-outs.

    摘要翻译: 诸如主机适配器的电路包括能够检测多个未决命令的超时的定时器。 定时器包括单个自由运行计数器,用于开始计数的第一存储器,用于超时值的第二存储器,减法器和比较器。 开始计数是从发出相关命令时保存的计数器的计数。 超时值表示不同类型的超时周期的长度。 为了检查命令是否超时,从第一存储器中选择与命令相关联的开始计数,并且减法器确定计数器中的当前计数与所选择的开始计数之间的差。 然后将该差异与根据超时类型从第二存储器中选择的超时值进行比较。 如果差值大于选定的超时值,则该命令超时。 在一个实施例中,第二存储器包括用于超时值的计数寄存器,多路复用器和向多路复用器提供选择信号的选择寄存器。 选择寄存器包含与该命令相关联的值,计数寄存器的数量与超时类型的数量相匹配。