公开(公告)号：US20130154737A1

公开(公告)日：2013-06-20

申请号：US13612789

申请日：2012-09-12

申请人： Yun-Shiang SHU

发明人： Yun-Shiang SHU

IPC分类号： H03F3/45 ,  H03K5/24

CPC分类号： H03K5/2481 ,  H03F3/45 ,  H03F3/45071 ,  H03F3/45179 ,  H03F3/45197 ,  H03F2203/45424 ,  H03F2203/45466 ,  H03F2203/45482 ,  H03F2203/45492 ,  H03K5/2472 ,  H03K5/249

摘要： A comparator has a differential pair circuit, a current control circuit, and a latch. The differential pair circuit has first and second comparator transistors, and is arranged to compare a first input and a second input according to a clock signal to generate a result indicating whether a difference of the first and second inputs exceeds an internal offset. The current control circuit is coupled in series with the differential pair circuit, and configured to provide unequal abilities of drawing currents for the first and second comparator transistors.

摘要翻译： 比较器具有差分对电路，电流控制电路和锁存器。 差分对电路具有第一和第二比较器晶体管，并且被布置为根据时钟信号比较第一输入和第二输入，以产生指示第一和第二输入的差是否超过内部偏移的结果。 电流控制电路与差分对电路串联耦合，并且被配置为提供对第一和第二比较器晶体管的拉电流的不相等的能力。

公开(公告)号：US08183922B2

公开(公告)日：2012-05-22

申请号：US12620351

申请日：2009-11-17

申请人： Jimmy Fort ,  Thierry Soude ,  Michel Cuenca ,  Florent Garcia ,  Franck Strazzieri

发明人： Jimmy Fort ,  Thierry Soude ,  Michel Cuenca ,  Florent Garcia ,  Franck Strazzieri

IPC分类号： H03F3/45

CPC分类号： H03F3/45179 ,  G05F3/245 ,  H03F3/45632 ,  H03F2200/447 ,  H03F2203/45101 ,  H03F2203/45482

摘要： A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).

摘要翻译： 对于与差分对的跨导增益成比例的不平衡差分对产生偏置电流。 当跨导增益变化（例如，由于温度变化）时，偏置电流按比例变化，从而保持恒定的偏移电压。 在一些实施方式中，电压 - 电流转换器电路从与温度和电压供应变化（例如，带隙参考电压）无关的恒定参考电压产生偏置电流。

公开(公告)号：US20110115560A1

公开(公告)日：2011-05-19

申请号：US12620351

申请日：2009-11-17

申请人： Jimmy Fort ,  Thierry Soude ,  Michel Cuenca ,  Florent Garcia ,  Franck Strazzieri

发明人： Jimmy Fort ,  Thierry Soude ,  Michel Cuenca ,  Florent Garcia ,  Franck Strazzieri

IPC分类号： H03F3/45 ,  G05F1/10

CPC分类号： H03F3/45179 ,  G05F3/245 ,  H03F3/45632 ,  H03F2200/447 ,  H03F2203/45101 ,  H03F2203/45482

摘要： A bias current is generated for an unbalanced differential pair that is proportional to the transconductance gain of the differential pair. When the transconductance gain varies (e.g., due to temperature variations), the bias current varies in proportion thereby maintaining a constant offset voltage. In some implementations, a voltage to current converter circuit generates the bias current from a constant reference voltage that is independent of temperature and voltage supply variations (e.g., a bandgap reference voltage).

摘要翻译： 对于与差分对的跨导增益成比例的不平衡差分对产生偏置电流。 当跨导增益变化（例如，由于温度变化）时，偏置电流按比例变化，从而保持恒定的偏移电压。 在一些实施方式中，电压 - 电流转换器电路从与温度和电压供应变化（例如，带隙参考电压）无关的恒定参考电压产生偏置电流。

公开(公告)号：US20090284315A1

公开(公告)日：2009-11-19

申请号：US12296367

申请日：2007-05-21

申请人： Satoshi Kobayashi ,  Junji Nakatsuka

发明人： Satoshi Kobayashi ,  Junji Nakatsuka

IPC分类号： H03F3/45 ,  H03F1/34

CPC分类号： H03F1/08 ,  H03F1/34 ,  H03F3/45192 ,  H03F3/45475 ,  H03F3/45632 ,  H03F2203/45248 ,  H03F2203/45431 ,  H03F2203/45466 ,  H03F2203/45482 ,  H03F2203/45522 ,  H03F2203/45524 ,  H03F2203/45526 ,  H03F2203/45544 ,  H03F2203/45631 ,  H03F2203/45692

摘要： An operational amplifier includes, between an input and an output of an operational amplifier (an operational amplification stage) 10, a feedback capacitor 34 connected in negative feedback, a phase control circuit 100 having a resistor element (a resistor unit) 30 connected in series to the feedback capacitor 34. Load capacitors (load units) 32 are connected on the output side of the operational amplifier 10 and driven by an output signal from the operational amplifier 10. In a case that the capacitance values of the load capacitor 32 and 33 are increased and the phase margin of the operational amplifier becomes excessive in comparison with the optimum value, a resistance value RO of the resistor element 30 is increased to control the phase margin of the operational amplifier so as to fall within the optimum range, and thus accelerated settling properties are realized. This invention thus provides a phase control circuit applicable even to a single-stage operational amplifier, and by enhancing the properties of the operational amplifier itself and enabling the phase margin to be controlled, realizes accelerated settling properties even in a case that a transient response is deteriorated.

摘要翻译： 运算放大器包括在运算放大器（运算放大级）10的输入和输出端之间，负反馈端连接的反馈电容器34，具有串联连接的电阻元件（电阻单元）30的相位控制电路100 负载电容器（负载单元）32连接在运算放大器10的输出侧并由运算放大器10的输出信号驱动。在负载电容器32和33的电容值的情况下 并且运算放大器的相位裕度与最佳值相比变得过大，电阻元件30的电阻值RO增加，以控制运算放大器的相位裕度落在最佳范围内，因此 实现了加速沉降特性。 因此，本发明提供了一种甚至可应用于单级运算放大器的相位控制电路，并且通过增强运算放大器本身的性质并使得能够控制相位裕度，即使在瞬态响应为 恶化

公开(公告)号：US07528636B2

公开(公告)日：2009-05-05

申请号：US11762075

申请日：2007-06-13

申请人： Chun-Yi Huang

发明人： Chun-Yi Huang

IPC分类号： H03K3/00

CPC分类号： H03F3/45237 ,  H03F3/4565 ,  H03F2200/513 ,  H03F2203/45008 ,  H03F2203/45074 ,  H03F2203/45101 ,  H03F2203/45466 ,  H03F2203/45482 ,  H03F2203/45504 ,  H03F2203/45681

摘要： A low differential output voltage circuit having a voltage generator and a differential output unit is provided. The voltage generator includes a first PMOS transistor, a first amplifier circuit, a unit gain stage, a first NMOS transistor, a second NMOS transistor. The differential output unit includes a first controlled current source, a second controlled current source, a common voltage circuit, a first switch, a second switch, a third switch, and a fourth switch. Due to the voltage generator directly provides a common mode voltage to the differential output unit, and the first amplifier circuit and the unit gain stage could overcome a channel modulation effect of MOS transistors and enhance the driving ability of the common mode voltage respectively. Thus, a response time of the invention is decreased, and an output current of the differential output unit is in a proportion to the reference current received by the voltage generator.

摘要翻译： 提供具有电压发生器和差分输出单元的低差分输出电压电路。 电压发生器包括第一PMOS晶体管，第一放大器电路，单位增益级，第一NMOS晶体管，第二NMOS晶体管。 差分输出单元包括第一受控电流源，第二受控电流源，公共电压电路，第一开关，第二开关，第三开关和第四开关。 由于电压发生器直接向差分输出单元提供共模电压，第一放大器电路和单元增益级可以克服MOS晶体管的沟道调制效应，并分别提高共模电压的驱动能力。 因此，本发明的响应时间减小，并且差分输出单元的输出电流与电压发生器接收的参考电流成比例。

公开(公告)号：US07511565B2

公开(公告)日：2009-03-31

申请号：US11455376

申请日：2006-06-19

申请人： Fesseha Tessera Seifu ,  Marco Fornasari ,  Samir Aboulhouda

发明人： Fesseha Tessera Seifu ,  Marco Fornasari ,  Samir Aboulhouda

IPC分类号： G05F1/10 ,  H03F3/45

CPC分类号： H03F1/301 ,  H03F3/45085 ,  H03F3/45179 ,  H03F3/45484 ,  H03F2203/45286 ,  H03F2203/45482 ,  H03F2203/45484

摘要： An integrated circuit comprises a gain stage circuit coupled to a compensation circuit. Both the gain stage circuit and the compensation circuit respectively comprise a first current source and a second current source that are subject to the same process variations. A negative feedback circuit is used to generate a corrective current in relation to the second current source, indicative of a current that needs to flow through a load in addition to a current flowing through the second current source in order for a variable voltage to be substantially equal to a reference voltage used to drive the first and second current sources. A compensating current corresponding to the corrective current generated for the second current source is applied to the first current source to compensate for process variation in the gain stage circuit in respect to the first current source.

摘要翻译： 集成电路包括耦合到补偿电路的增益级电路。 增益级电路和补偿电路都分别包括受到相同工艺变化的第一电流源和第二电流源。 使用负反馈电路来产生相对于第二电流源的校正电流，其指示除了流过第二电流源的电流之外还需要流过负载的电流，以使可变电压基本上 等于用于驱动第一和第二电流源的参考电压。 与第二电流源产生的校正电流相对应的补偿电流被施加到第一电流源，以补偿增益级电路相对于第一电流源的工艺变化。

公开(公告)号：US20080150633A1

公开(公告)日：2008-06-26

申请号：US11684075

申请日：2007-03-09

申请人： Alireza Zolfaghari

发明人： Alireza Zolfaghari

IPC分类号： H03F3/38

CPC分类号： H03F1/3276 ,  H03F1/3211 ,  H03F3/45183 ,  H03F3/45188 ,  H03F3/45766 ,  H03F2203/45482 ,  H03F2203/45624

摘要： Methods and systems for reducing AM/PM distortion in a polar amplifier are disclosed and may comprise adding an offset signal to an amplitude signal in the digital domain and removing the offset signal in the analog domain during polar modulation. A sum of an amplitude signal and an offset signal may be mixed with a phase signal in a first differential amplifier to generate a first voltage signal, and the offset signal may be mixed with the phase signal in a second differential amplifier to generate a second voltage signal, which may be subtracted from the first voltage signal. The amplitude and offset signals may be mixed with the phase signal by modulating a current in the differential amplifiers, which may comprise cascode differential amplifiers. The modulated current may be generated using a current source and a current mirror circuit, which may comprise a cascode current mirror.

摘要翻译： 公开了用于减少极性放大器中的AM / PM失真的方法和系统，并且可以包括将偏移信号添加到数字域中的幅度信号，并且在极化调制期间去除模拟域中的偏移信号。 振幅信号和偏移信号的和可以与第一差分放大器中的相位信号混合以产生第一电压信号，并且偏移信号可以与第二差分放大器中的相位信号混合以产生第二电压 信号，其可以从第一电压信号中减去。 幅度和偏移信号可以通过调制差分放大器中的电流而与相位信号混合，差分放大器可以包括共源共栅差分放大器。 可以使用电流源和电流镜电路来产生调制电流，电流源和电流镜电路可以包括共源共栅电流镜。

公开(公告)号：US20080061847A1

公开(公告)日：2008-03-13

申请号：US11882494

申请日：2007-08-02

申请人： Masashi Nakagawa

发明人： Masashi Nakagawa

IPC分类号： H03B1/00 ,  H03F3/45

CPC分类号： H03F3/45183 ,  H03F3/45766 ,  H03F2203/45101 ,  H03F2203/45291 ,  H03F2203/45354 ,  H03F2203/45466 ,  H03F2203/45482 ,  H03F2203/45508 ,  H03F2203/45624 ,  H03F2203/45686 ,  H03F2203/45702

摘要： A conventional driver circuit has difficulty in controlling output voltages such as an output amplitude and a middle voltage in a CML circuit. Furthermore, in another conventional driver circuit, a high level of an output voltage in the CML circuit is dropped from a power supply voltage. To solve these problems, disclosed is a driver circuit including: an amplitude converter which converts the amplitude of a differential output signal and outputs a differential output signal; an amplitude setting unit which sets the amplitude of the differential output signal; and a common voltage setting unit which sets a center potential of the amplitude of the differential output signal.

摘要翻译： 常规的驱动电路难以控制CML电路中的输出电压，例如输出幅度和中间电压。 此外，在另一传统驱动电路中，CML电路中的高电平输出电压从电源电压下降。 为了解决这些问题，公开了一种驱动器电路，包括：幅度转换器，其转换差分输出信号的幅度并输出差分输出信号; 振幅设定单元，其设定差分输出信号的振幅; 以及公共电压设定单元，其设定差分输出信号的振幅的中心电位。

公开(公告)号：US07265621B1

公开(公告)日：2007-09-04

申请号：US11181564

申请日：2005-07-13

申请人： Byung-Moo Min

发明人： Byung-Moo Min

IPC分类号： H03F3/45

CPC分类号： H03F3/45188 ,  H03F3/4565 ,  H03F3/45654 ,  H03F2203/45052 ,  H03F2203/45088 ,  H03F2203/45194 ,  H03F2203/45334 ,  H03F2203/45352 ,  H03F2203/45354 ,  H03F2203/45482

摘要： An operational amplifier includes a pair of differential input transistors, a pair of cascode transistors and a keep-alive circuit. The pair of differential input transistors is connected together at the source terminals and the gate terminals of the input transistors receive a pair of differential input signals. Each cascode transistor is connected to a respective input transistor to form a cascode. The drain terminals of the pair of cascode transistors provide a pair of differential output signals. The keep-alive circuit is connected to provide first and second bias currents to the source terminals of the pair of cascode transistors. In operation, each of the first and second bias currents is a variable current being a function of a voltage at the source terminal of the respective cascode transistor. The first and second bias currents keep the pair of cascode transistors alive during transient overload conditions.

摘要翻译： 运算放大器包括一对差分输入晶体管，一对共源共栅晶体管和保持电路。 一对差分输入晶体管在源极端子处连接在一起，并且输入晶体管的栅极端子接收一对差分输入信号。 每个共源共栅晶体管连接到相应的输入晶体管以形成共源共栅。 一对共源共栅晶体管的漏极端子提供一对差分输出信号。 保持电路被连接以向该对共源共栅晶体管的源极端提供第一和第二偏置电流。 在操作中，第一和第二偏置电流中的每一个是可变电流，其是相应共源共栅晶体管的源极端处的电压的函数。 在瞬态过载条件下，第一和第二偏置电流保持该对共源共栅晶体管存活。

公开(公告)号：US20060103560A1

公开(公告)日：2006-05-18

申请号：US11058194

申请日：2005-02-16

申请人： Toshiaki Nagai

发明人： Toshiaki Nagai

IPC分类号： H03M3/00

CPC分类号： H03F3/45197 ,  H03F2203/45072 ,  H03F2203/45482 ,  H03H11/0455 ,  H03H11/0472 ,  H03M3/37 ,  H03M3/424 ,  H03M3/452

摘要： A filter circuit includes a plurality of integrator stages, each stage including a voltage-to-current converter to convert an input voltage into a current supplied to an output thereof and a capacitor coupled to the output of the voltage-to-current converter, a voltage charged in the capacitor being supplied to a next stage as an output of each stage, and a capacitor serving as a feed-forward coupling that couples the output of at least one stage of the plurality of integrator stages to a last output node.

摘要翻译： 滤波器电路包括多个积分器级，每个级包括电压 - 电流转换器，用于将输入电压转换成提供给其输出的电流和耦合到电压 - 电流转换器的输出的电容器; 被提供给下一级的电容器中的电压作为每个级的输出，以及用作将多个积分器级的至少一级的输出耦合到最后输出节点的前馈耦合的电容器。