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公开(公告)号：US20190130858A1
公开(公告)日：2019-05-02
申请号：US15969129
申请日：2018-05-02
Inventor： Juncheng XIAO , Ronglei DAI
IPC: G09G3/36 , H03K17/687
Abstract: A gate driving circuit provided in the disclosure comprises a pull-up control module configured to generate a first control signal when power is turned off, a pull-up output module configured to output a high potential under control of the first control signal, a pull-down control module configured to generate a second control signal when power is turned off, and a pull-down output module configured to output a low potential under control of the second control signal. Wherein, the output terminals of the pull-up output module and the pull-down output module are connected to the output terminal of a Nth-stage gate driving unit, and, when power is turned off, the pull-up output module and the pull-down output module together make the output terminal of the Nth-stage gate driving unit output the high potential. The image remained on the liquid crystal screen when power is turned off suddenly is cleaned quickly thereby.
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公开(公告)号：US20190129547A1
公开(公告)日：2019-05-02
申请号：US15970589
申请日：2018-05-03
Inventor： Ronglei DAI
IPC: G06F3/041 , G02F1/1345 , G09G3/36
CPC classification number: G06F3/0412 , G02F1/13454 , G06F3/0416 , G09G3/3677 , G09G2300/0408 , G09G2354/00
Abstract: The present application provides a single-type GOA circuit comprising a controllable signal setting unit for providing a controllable signal. The controllable signal is held at a potential of a constant low-level voltage source when the circuit is operated in normal status, and at a potential of a constant high-level voltage source when the circuit is in a transmission suspended period. The potential of the signals in the current leakage path in the transmission suspended period is changed in the application so that voltage controlling and leakage path eliminating could be achieved and stability of the circuit is increased.
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公开(公告)号：US20180231818A1
公开(公告)日：2018-08-16
申请号：US15515254
申请日：2016-10-28
Inventor： Shangcao CAO , Ronglei DAI
IPC: G02F1/1333 , G09G3/36 , G02F1/133 , G06F3/041
CPC classification number: G02F1/13338 , G02F1/13306 , G06F3/0412 , G06F3/0416 , G06F3/044 , G09G3/36 , G09G3/3648 , G09G3/3677 , G09G2310/0286
Abstract: The present invention provides a GOA drive circuit and embedded type touch display panel. The GOA drive circuit comprises GOA units cascade coupled in multilevel, the nth level GOA unit comprises an output end pull down unit and an output control unit, both the output end pull down unit and the output control unit are employed to control a signal outputted by an output end of the nth level GOA unit, and one end of the output end pull down unit is coupled to a first end point, the first end point is loaded with a first signal, and one end of the output control unit is coupled to a nth clock signal, and as the embedded touch display panel enters signal interrupt and performs a touch scan, the output control unit is off to cut off an output path that the nth clock signal outputs to the output end.
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公开(公告)号：US20220351663A1
公开(公告)日：2022-11-03
申请号：US16766832
申请日：2020-03-24
Inventor： Ronglei DAI , Zuoyuan XU
IPC: G09G3/20
Abstract: A display panel includes an array substrate, a plurality of cascading GOA units, a plurality of DEMUX switching units, and a DEMUX control signal generating circuit. One DEMUX switching unit includes a scanning signal input port, at least two control signal input ports, and at least two scanning signal output ports. One GOA unit is connected to the scanning signal input port, the DEMUX control signal generating circuit is connected to the at least two control signal input ports, and the scanning signal output ports are connected to corresponding gate lines.
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公开(公告)号：US20170193944A1
公开(公告)日：2017-07-06
申请号：US14900684
申请日：2015-10-21
Applicant: Shenzhen China Star OptoelectronicsTechnology Co. Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng XIAO , Ronglei DAI , Shangcao CAO , Yao YAN
IPC: G09G3/36
CPC classification number: G09G3/3677 , G02F1/136286 , G02F1/1368 , G02F2203/64 , G09G2300/0408 , G09G2310/0245 , G09G2310/0286 , G09G2310/08 , G09G2320/0214 , G09G2330/026 , G11C19/28
Abstract: The disclosure provides a GOA circuit, a driving method thereof and a liquid crystal display device. The GOA circuit comprises a plurality of GOA units connected in cascade, wherein the N-stage GOA unit comprises a N-stage stage circuit, a N-stage Q point control circuit, a N-stage P point circuit, a N-stage output circuit and a switch circuit. The switch circuit is connected to the N-stage scan line for sending a turn-on signal to the N-stage scan line before the liquid crystal display device displays an image such that the thin-film transistor in the pixel connected to the N-stage scan line turns on. The disclosure may turn on the gate of each pixel when the display device is waken from the black screen to prevent the electricity leakage when the display device is wakened from the black screen, and may also increase the stability of the circuit.
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Patent Agency Ranking
公开(公告)号：US20170162148A1
公开(公告)日：2017-06-08
申请号：US14888426
申请日：2015-09-29
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng XIAO , Ronglei DAI , Yao YAN , Shangcao CAO
IPC: G09G3/36 , G02F1/1362
CPC classification number: G09G3/3674 , G02F1/1362 , G09G3/20 , G09G3/3648 , G09G2300/0408 , G09G2300/0434 , G09G2310/0202 , G09G2310/0218 , G09G2310/0267 , G09G2310/0286 , G11C19/287
Abstract: The invention discloses a GOA circuit, a display device and a drive method of a GOA circuit, the GOA circuit is set to be GOA units including a plurality of levels, a N leveled GOA unit is applied to charge a N leveled scanning line of a display region of the display device, the N leveled scanning line is connected to a first gate all on signal and a second gate all on signal, which can guarantee scanning lines corresponding to all the GOA units are being charged under control of the first gate all on signal and the second gate all on signal. The invention can carry out an all gate on function according to the method above.
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公开(公告)号：US20240047480A1
公开(公告)日：2024-02-08
申请号：US17610709
申请日：2021-08-09
Inventor： Zuoyuan XU , Ronglei DAI , Qiang GONG
IPC: H01L27/12
CPC classification number: H01L27/1244
Abstract: A display panel is provided. In the display panel, a plurality of first output terminals are arranged along an extending direction of a first side of a drive chip, a plurality of second output terminals are disposed on a side of the first output terminals away from a display area, and the plurality of second output terminals are disposed in an area between the plurality of first output terminals and an input terminal. Each second fan-out trace is electrically connected with a corresponding second output terminal through a second side of an adjacent drive chip, so that the drive chip can be moved upward as a whole and a lower frame can be reduced. A display device is also provided.
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公开(公告)号：US20200098327A1
公开(公告)日：2020-03-26
申请号：US15748243
申请日：2017-11-27
Inventor： Ronglei DAI
IPC: G09G3/36
Abstract: A GOA circuit comprises m cascaded GOA units, wherein a GOA unit comprises forward-reverse scan control module, first gate signal output module and second gate signal output module. The forward-reverse scan control module controls the GOA circuit to perform forward scanning or reverse scanning. The first gate signal output module comprises seventh TFT, ninth TFT and sixteenth TFT; a second terminal of the sixteenth TFT receives a high potential signal, and a first and a third terminal of the sixteenth TFT are connected to the first and second terminals of the seventh TFT, respectively. The second gate signal output module comprises twelfth TFT, thirteenth TFT and fifteenth TFT; a second terminal of the fifteenth TFT receives the high potential signal, and a first and a third terminal of the fifteenth TFT are connected to the first and second terminals of the twelfth TFT, respectively.
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公开(公告)号：US20190130859A1
公开(公告)日：2019-05-02
申请号：US15969246
申请日：2018-05-02
Inventor： Ronglei DAI
IPC: G09G3/36
CPC classification number: G09G3/3677 , G09G2300/0408 , G09G2310/0286 , G09G2310/063 , G09G2320/0257 , G09G2330/027 , G11C19/28
Abstract: The disclosure provides a GOA driving circuit comprising a plurality of GOA driving unit stages. When power is turned off, the pull-up control module controls the pull-up output module to stop outputting the clock signal, the pull-down control module controls the pull-down output module to stop outputting the low potential signal, the first global control module outputs the high potential signal, the reset module stops outputting the reset signal, and the second global control module stops outputting the low potential signal. Generation of the residual image on the liquid crystal screen is prevented when power is turned off.
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公开(公告)号：US20170162150A1
公开(公告)日：2017-06-08
申请号：US14786071
申请日：2015-09-21
Applicant: Shenzhen China Star Optoelectronics Technology Co., Ltd. , Wuhan China Star Optoelectronics Technology Co., Ltd.
Inventor： Juncheng XIAO , Shangcao CAO , Yao YAN , Ronglei DAI
IPC: G09G3/36
CPC classification number: G09G3/3677 , G02F1/133 , G09G3/36 , G09G3/3696 , G09G2300/0408 , G09G2300/0871 , G09G2310/0202 , G09G2310/08
Abstract: A liquid crystal display device and a gate driving circuit are disclosed. The gate driving circuit includes multiple-stage gate driving units and a control chip. Each stage gate driving unit includes a first pulling control unit, a first pulling unit, a second pulling control unit, a second pulling unit, a first control unit, a second control unit and a third control unit. The control chip is used for pulling a first clock signal and a first voltage reference signal to a first voltage level. Accordingly, the scanning lines driven by the gate driving circuit are all turned on in order to stably realize an All-Gate-On function.
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