Millimeter-wave scalable PLL-coupled array for phased-array applications

    公开(公告)号:US11588240B2

    公开(公告)日:2023-02-21

    申请号:US17496626

    申请日:2021-10-07

    Abstract: Techniques, systems and architectures for generating desired phase shifts in a phased array to control the directions of radiation in a wide range of angles are disclosed. Particularly, phased array architectures based on novel PLL-coupled phase shifting techniques for implementation in millimeter-wave (mm-wave) and sub-terahertz (sub-THz) operations range are described. In one aspect, a phased array including an array of unit cells is disclosed. In some embodiments, each unit cell in the array of unit cells includes a dual-nested PLL that is configured to effectuate phase locking and frequency locking to a reference signal from an adjacent unit cell. Moreover, each PLL includes control circuitry that can generate a wide range of phase shifts between adjacent unit cells to facilitate phased-array operations. Note that using the dual-nested PLL to generate a desired phase shift between adjacent radiating elements eliminates the use of conventional lossy phase shifters in the phased array.

    MULTI-CHANNEL CODE-DIVISION MULTIPLEXING IN FRONT-END INTEGRATED CIRCUITS
    7.
    发明申请
    MULTI-CHANNEL CODE-DIVISION MULTIPLEXING IN FRONT-END INTEGRATED CIRCUITS 审中-公开
    前端集成电路中的多通道编码多路复用

    公开(公告)号:US20130322469A1

    公开(公告)日:2013-12-05

    申请号:US13686803

    申请日:2012-11-27

    CPC classification number: H04J13/10 H04B1/707 H04B2201/70707

    Abstract: A code-division multiplexing (CDM) system utilized in multi-channel (MC) front-end integrated circuits to significantly reduce the power consumption of such systems. The CDM system extends data compression advantages to uncorrelated and weakly correlated MC signals through the introduction of a new Multi-Channel Signal Binning and Multiplexing (MCSBM) method and architecture. The method achieves significant reductions in power consumption in comparison to a conventional time-division multiplexing quantizer, while adding only a modest amount of overhead and complexity. Systems and methods permit architects to fabricate MC integrated circuits with ultra low power consumption and small chip area. Another embodiment relates to the system's compressor organizing samples of the input signal in such a way that the downstream analog-to-digital converter quantizes the higher variance samples with a higher resolution compared to the resolution it uses to quantize other samples with lower variance.

    Abstract translation: 在多通道(MC)前端集成电路中使用的码分多路复用(CDM)系统可显着降低这种系统的功耗。 CDM系统通过引入新的多信道信号分组和复用(MCSBM)方法和架构,将数据压缩优势扩展到不相关和弱相关的MC信号。 与传统的时分复用量化器相比,该方法实现了功耗的显着降低,同时仅增加了适量的开销和复杂度。 系统和方法允许建筑师制造具有超低功耗和小芯片面积的MC集成电路。 另一实施例涉及系统的压缩机组合输入信号的样本,使得下游模数转换器与其用于量化具有较低方差的其他样本的分辨率相比,以更高的分辨率量化较高方差样本。

    MILLIMETER-WAVE SCALABLE PLL-COUPLED ARRAY FOR PHASED-ARRAY APPLICATIONS

    公开(公告)号:US20220109236A1

    公开(公告)日:2022-04-07

    申请号:US17496626

    申请日:2021-10-07

    Abstract: Techniques, systems and architectures for generating desired phase shifts in a phased array to control the directions of radiation in a wide range of angles are disclosed. Particularly, phased array architectures based on novel PLL-coupled phase shifting techniques for implementation in millimeter-wave (mm-wave) and sub-terahertz (sub-THz) operations range are described. In one aspect, a phased array including an array of unit cells is disclosed. In some embodiments, each unit cell in the array of unit cells includes a dual-nested PLL that is configured to effectuate phase locking and frequency locking to a reference signal from an adjacent unit cell. Moreover, each PLL includes control circuitry that can generate a wide range of phase shifts between adjacent unit cells to facilitate phased-array operations. Note that using the dual-nested PLL to generate a desired phase shift between adjacent radiating elements eliminates the use of conventional lossy phase shifters in the phased array.

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