RECEIVER ARCHITECTURE DEMODULATING 4N-QAM DIRECTLY IN ANALOG DOMAIN WITHOUT ANALOG-TO-DIGITAL CONVERTER (ADC)

    公开(公告)号:US20250168051A1

    公开(公告)日:2025-05-22

    申请号:US19026969

    申请日:2025-01-17

    Abstract: Disclosed are example embodiments of a receiver. The receiver including a front-end amplification and filtering block configured to amplify a received signal and filter out a potential jammer signal from a communication channel. The receiver also including a quadrature mixer, coupled to the front-end amplification and filtering block, and configured to down-convert the amplified and filtered signal to baseband to generate a quadrature LO signal. Additionally, the receiver including a carrier synchronization loop configured to synchronize the quadrature LO signal and carrier phase of the received signal. The receiver also including a demodulator coupled to the quadrature mixer and the carrier synchronization loop.

Patent Agency Ranking