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公开(公告)号：US20190219671A1
公开(公告)日：2019-07-18
申请号：US16359544
申请日：2019-03-20
CPC分类号： G01S7/352 , G01S7/285 , G01S13/282 , G01S13/343 , G01S13/931
摘要： A method of radar signal processing includes providing an analog front end (AFE) including an amplifier coupled between an antenna and an ADC in a receive path, where an ADC output is coupled to an input of an elastic ADC buffer (elastic buffer) including a divided memory with for writing samples from the ADC (samples) while reading earlier written samples to a first signal processor by a high speed interface. A transmit path includes at least one power amplifier provided by the AFE coupled to drive an antenna. A Greatest Common Divisor (GCD) is determined across all chirps in a radar frame programmed to be used. For each frame a sample size for the elastic buffer is dynamically controlled constant to be equal to the GCD for reading samples from one memory block and writing samples to another memory block throughout all chirps in the frame.
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公开(公告)号：US20230296714A1
公开(公告)日：2023-09-21
申请号：US17696338
申请日：2022-03-16
CPC分类号： G01S1/045 , G01S19/254 , G01S19/30
摘要： One example includes a passive radar receiver system including an RF receiver front-end to receive a wireless source signal and a reflected signal. An antenna switch of the front-end switches a first antenna to a receiver chain during a first time to generate first radar signal data based on a combined wireless signal comprising wireless source signal and the reflected signal, and switches a second antenna to the receiver chain during a second time to generate second radar signal data based on the combined wireless signal. A signal processor generates source signal data associated with the wireless source signal based on the first and second radar signal data and generates reflected signal data associated with the reflected signal based on the first and second radar signal data, and generates target radar data associated with a target based on the source and reflected radar signal data.
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公开(公告)号：US11650304B2
公开(公告)日：2023-05-16
申请号：US17019509
申请日：2020-09-14
发明人： Dan Wang , Meysam Moallem , Brian Ginsburg
IPC分类号： G01S13/44 , G01S7/02 , G01S7/35 , G01S13/50 , G01S13/87 , G01S13/34 , G01S13/931 , G01S13/933
CPC分类号： G01S13/449 , G01S7/024 , G01S7/025 , G01S7/026 , G01S7/354 , G01S13/50 , G01S13/878 , G01S13/346 , G01S13/931 , G01S13/933
摘要： A millimeter or mm-wave system includes transmission of a millimeter wave (mm-wave) radar signal by a transmitter to an object. The transmitted mm-wave radar signal may include at least two signal orientations, and in response to each signal orientation, the object reflects corresponding signal reflections. The signal reflections are detected and a determination is made as to location of the object.
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公开(公告)号：US11035928B2
公开(公告)日：2021-06-15
申请号：US15642880
申请日：2017-07-06
IPC分类号： G01S7/03 , G01S7/40 , G01S13/87 , H04L7/04 , G01S13/931
摘要： The disclosure provides a radar apparatus for estimating a position and a velocity of a plurality of obstacles. The radar apparatus includes a slave radar chip. A master radar chip is coupled to the slave radar chip. The master radar chip includes a local oscillator that generates a transmit signal. The slave radar chip receives the transmit signal on a first path and sends the transmit signal back to the master radar chip on a second path. A delay detect circuit is coupled to the local oscillator and receives the transmit signal from the slave radar chip on the second path and the transmit signal from the local oscillator. The delay detect circuit estimates a routing delay from the transmit signal received from the slave radar chip on the second path and from the transmit signal received from the local oscillator.
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公开(公告)号：US10142095B2
公开(公告)日：2018-11-27
申请号：US15334979
申请日：2016-10-26
摘要： A integrated circuit (IC) chip can include a root timer that generates a frame pulse based on a start trigger signal. The IC chip can also include a hardware clock control that provides a clock signal based on a selected one of the frame pulse and the synchronization signal provided from one of the root timer and another IC chip. The IC chip can further include a plurality of analog to digital converters (ADCs). Each of the plurality of ADCs being configured to sample an output of a respective one of a plurality of radio frequency (RF) receivers based on the clock signal.
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6.发明申请公开(公告)号：US20160146931A1
公开(公告)日：2016-05-26
申请号：US14550774
申请日：2014-11-21
CPC分类号： G01S7/032 , G01S13/343 , G01S13/931 , H01Q1/3233
摘要： A device includes a circuit board having thereon, a controlling component, a first radar chip and a second radar chip. The first radar chip includes a first radar transmission antenna, a second radar transmission antenna and a first radar receiver antenna array. The second radar chip includes a second radar receiver antenna array. The controlling component can control the first radar chip and the second radar chip. The first radar transmission antenna can transmit a first radar transmission signal. The second radar transmission antenna can transmit a second radar transmission signal. The second radar chip is spaced from the first radar chip so as to create a virtual receiver antenna array between the first radar receiver antenna array and the second radar receiver antenna array.
摘要翻译： 一种装置包括其上具有控制部件，第一雷达芯片和第二雷达芯片的电路板。 第一雷达芯片包括第一雷达发射天线，第二雷达发射天线和第一雷达接收机天线阵列。 第二雷达芯片包括第二雷达接收机天线阵列。 控制部件可以控制第一雷达芯片和第二雷达芯片。 第一雷达发射天线可以传输第一雷达传输信号。 第二雷达发射天线可以发射第二雷达传输信号。 第二雷达芯片与第一雷达芯片间隔开，以在第一雷达接收机天线阵列和第二雷达接收机天线阵列之间创建虚拟接收机天线阵列。
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公开(公告)号：US12081362B2
公开(公告)日：2024-09-03
申请号：US17192271
申请日：2021-03-04
发明人： Jasbir Singh , Brian Ginsburg
CPC分类号： H04L12/40117 , G06F16/288 , H04L12/40071 , H04L2012/40273
摘要： A method includes receiving first data at a controller of an ADAS via a first virtual channel of a camera serial interface 2 (CSI-2) data interface. The method also includes receiving second data at the controller of the ADAS via a second virtual channel of the CSI-2 data interface. The method includes storing the first data at a first address in a memory, the first address specified by the first virtual channel. The method also includes storing the second data at a second address of a control register, the control register specified by the second data. The method includes performing a test using the first data and the second data.
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公开(公告)号：US11333738B2
公开(公告)日：2022-05-17
申请号：US16359544
申请日：2019-03-20
IPC分类号： G01S7/35 , G01S13/28 , G01S13/34 , G01S7/285 , G01S13/931
摘要： A method of radar signal processing includes providing an analog front end (AFE) including an amplifier coupled between an antenna and an ADC in a receive path, where an ADC output is coupled to an input of an elastic ADC buffer (elastic buffer) including a divided memory with for writing samples from the ADC (samples) while reading earlier written samples to a first signal processor by a high speed interface. A transmit path includes at least one power amplifier provided by the AFE coupled to drive an antenna. A Greatest Common Divisor (GCD) is determined across all chirps in a radar frame programmed to be used. For each frame a sample size for the elastic buffer is dynamically controlled constant to be equal to the GCD for reading samples from one memory block and writing samples to another memory block throughout all chirps in the frame.
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公开(公告)号：US10659078B2
公开(公告)日：2020-05-19
申请号：US16200061
申请日：2018-11-26
摘要： A integrated circuit (IC) chip can include a root timer that generates a frame pulse based on a start trigger signal. The IC chip can also include a hardware clock control that provides a clock signal based on a selected one of the frame pulse and the synchronization signal provided from one of the root timer and another IC chip. The IC chip can further include a plurality of analog to digital converters (ADCs). Each of the plurality of ADCs being configured to sample an output of a respective one of a plurality of radio frequency (RF) receivers based on the clock signal.
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公开(公告)号：US20190004167A1
公开(公告)日：2019-01-03
申请号：US16121689
申请日：2018-09-05
发明人： Sandeep Rao , Karthik Subburaj , Brian Ginsburg , Karthik Ramasubramanian , Jawaharlal Tangudu , Sachin Bharadwaj
摘要： The disclosure provides a radar apparatus for estimating a range of an obstacle. The radar apparatus includes a local oscillator that generates a first ramp segment and a second ramp segment. The first ramp segment and the second ramp segment each includes a start frequency, a first frequency and a second frequency. The first frequency of the second ramp segment is equal to or greater than the second frequency of the first ramp segment when a slope of the first ramp segment and a slope of the second ramp segment are equal and positive. The first frequency of the second ramp segment is equal to or less than the second frequency of the first ramp segment when the slope of the first ramp segment and the slope of the second ramp segment are equal and negative.
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