公开(公告)号：US3808474A

公开(公告)日：1974-04-30

申请号：US31101672

申请日：1972-11-30

Applicant: TEXAS INSTRUMENTS INC

Inventor： COOKE H ,  EMERY F

IPC: H01L21/60 ,  H01L23/66 ,  H01L5/00

CPC classification number: H01L24/85 ,  H01L23/66 ,  H01L24/48 ,  H01L24/49 ,  H01L2223/6644 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/4847 ,  H01L2224/49109 ,  H01L2224/49175 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01029 ,  H01L2924/01079 ,  H01L2924/014 ,  H01L2924/07802 ,  H01L2924/15747 ,  H01L2924/30105 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/3025 ,  H01L2224/78 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

Abstract: A package and mounting suitable for microwave transistors wherein lead inductances are substantially reduced and heat dissipation is improved. A semiconductor substrate having p-n junctions at one of its surfaces has its opposite surface secured to a thermally conductive electrically insulating member on a thermally conductive electrically conductive substrate which acts as the common input to the device. The member is embedded in and partially surrounded by the electrically conductive substrate in a manner that increases the interface surface area of contact between the heat dissipating member and the thermally conductive substrate and shortens the lengths of wire necessary to make connections to the substrate. Parallel connecting paths to each side of the p-n junctions extend in opposite directions over the sides of the semiconductor substrate and are interleaved on each side of the semiconductor substrate to substantially reduce lead inductances by means of the bucking effects of the generated magnetic fields. The electrically conducting substrate has a portion which is positioned intermediate to the input and output leads to the device in a substantially common plane and effectively provides shielding for further reducing lead inductances.

Abstract translation: 一种适用于微波晶体管的封装和安装件，其中引线电感被显着地减少并且散热得到改善。 在其一个表面上具有p-n结的半导体衬底的相对表面固定在作为该器件的公共输入的导热导电衬底上的导热电绝缘构件上。 该构件以增加散热构件和导热衬底之间的接触界面表面积的方式嵌入并部分地被导电衬底包围，并缩短了与衬底连接所需的电线长度。 在p-n结的每一侧的平行连接路径在半导体衬底的侧面上以相反的方向延伸，并且在半导体衬底的每一侧交错，以通过所产生的磁场的屈曲效应来显着降低引线电感。 导电衬底具有位于输入和输出中间的部分，并且输出到基本上共同的平面中的器件，并且有效地提供用于进一步减小引线电感的屏蔽。