Relative frequency offset error and phase error detection for clocks

    公开(公告)号:US10608649B1

    公开(公告)日:2020-03-31

    申请号:US16194678

    申请日:2018-11-19

    Abstract: An apparatus for providing a clock signal based on a received clock signal includes a time-to-digital converter configured to generate timestamp information based on the received clock signal. The apparatus includes a first filter configured to generate clock period information based on the timestamp information. The apparatus includes a phase monitor circuit. The phase monitor circuit includes a second filter configured to provide a mean period signal of the received clock signal based on the clock period information. The phase monitor includes a phase error detection circuit configured to generate a phase error indicator based on a threshold difference value and a difference between the clock period information and expected clock period information. The expected clock period information is based on the mean period signal.

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