公开(公告)号：US20210193555A1

公开(公告)日：2021-06-24

申请号：US17029334

申请日：2020-09-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonho LEE ,  Jinsu KIM ,  Junwoo MYUNG ,  Yongjin PARK ,  Jaekul LEE

IPC: H01L23/373 ,  H01L23/31 ,  H01L23/053 ,  H01L23/498

Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.

公开(公告)号：US20210028357A1

公开(公告)日：2021-01-28

申请号：US16826778

申请日：2020-03-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Junhwan PAIK ,  Yongjin PARK ,  Jinwook YANG ,  Gyuhwan OH ,  Jiyoon CHUNG

IPC: H01L45/00 ,  H01L23/528 ,  H01L27/24

Abstract: A variable resistance memory device includes a first conductive line structure having an adiabatic line therein on a substrate, a variable resistance pattern contacting an upper surface of the first conductive line structure, a low resistance pattern contacting an upper surface of the variable resistance pattern, a selection structure on the low resistance pattern, and a second conductive line on the selection structure.

公开(公告)号：US20220246506A1

公开(公告)日：2022-08-04

申请号：US17685227

申请日：2022-03-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongjin PARK ,  Myungsam KANG ,  Younggwan KO

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522

Abstract: A package module includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and having a connection pad electrically connected to the one or more redistribution layers, a plurality of electronic components disposed on the connection structure and electrically connected to the one or more redistribution layers, one or more frames disposed on the connection structure, and an encapsulant disposed on the connection structure, and respectively covering at least portions of the semiconductor chip, the plurality of electronic components, and the one or more frames. At least a portion of an outer side surface of the encapsulant is coplanar on the same level as at least a portion of an outer side surface of at least one of the one or more frames.

公开(公告)号：US20230268248A1

公开(公告)日：2023-08-24

申请号：US18310284

申请日：2023-05-01

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonho LEE ,  Jinsu KIM ,  Junwoo MYUNG ,  Yongjin PARK ,  Jaekul LEE

IPC: H01L23/373 ,  H01L23/498 ,  H01L23/053 ,  H01L23/31

CPC classification number: H01L23/3735 ,  H01L23/49822 ,  H01L23/053 ,  H01L23/3128

Abstract: A semiconductor device including a semiconductor chip having a first surface and a second surface opposite to the first surface, a first heat dissipation member on the second surface of the semiconductor chip, the first heat dissipation member having a vertical thermal conductivity in a direction perpendicular to the second surface, and a horizontal thermal conductivity in a direction parallel to the second surface, the first vertical thermal conductivity being smaller than the first horizontal thermal conductivity, and a second heat dissipation member comprising a vertical pattern penetrating the first heat dissipation member, the second heat dissipation member having a vertical thermal conductivity that is greater than the vertical thermal conductivity of the first heat dissipation member may be provided.

公开(公告)号：US20210257337A1

公开(公告)日：2021-08-19

申请号：US17019616

申请日：2020-09-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongjin PARK ,  Sunghawn BAE ,  Won CHOI

IPC: H01L25/065 ,  H01L25/18 ,  H01L23/00 ,  H01L25/00 ,  H01L25/10

Abstract: A semiconductor package includes: a redistribution substrate; a frame including first and second vertical connection conductors, and having a through-hole; first and second semiconductor chips; an encapsulant; a second redistribution structure disposed on the encapsulant, a conductive wire electrically connecting the second semiconductor chip and the second vertical connection conductor; and a vertical connection via penetrating a portion of the encapsulant, and electrically connecting the second redistribution structure and the first vertical connection conductor. The first semiconductor chip is connected to the second vertical connection conductor by the first redistribution structure.

公开(公告)号：US20220367417A1

公开(公告)日：2022-11-17

申请号：US17863695

申请日：2022-07-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongjin PARK ,  Sunghawn BAE ,  Won CHOI

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00 ,  H01L25/10 ,  H01L25/18

Abstract: A semiconductor package includes: a redistribution substrate; a frame including first and second vertical connection conductors, and having a through-hole; first and second semiconductor chips; an encapsulant; a second redistribution structure disposed on the encapsulant, a conductive wire electrically connecting the second semiconductor chip and the second vertical connection conductor; and a vertical connection via penetrating a portion of the encapsulant, and electrically connecting the second redistribution structure and the first vertical connection conductor. The first semiconductor chip is connected to the second vertical connection conductor by the first redistribution structure.

公开(公告)号：US20200176364A1

公开(公告)日：2020-06-04

申请号：US16590570

申请日：2019-10-02

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Yongjin PARK ,  Myungsam KANG ,  Younggwan KO

IPC: H01L23/495 ,  H01L23/00 ,  H01L23/31 ,  H01L23/522

Abstract: A package module includes a connection structure including one or more redistribution layers, a semiconductor chip disposed on the connection structure and having a connection pad electrically connected to the one or more redistribution layers, a plurality of electronic components disposed on the connection structure and electrically connected to the one or more redistribution layers, one or more frames disposed on the connection structure, and an encapsulant disposed on the connection structure, and respectively covering at least portions of the semiconductor chip, the plurality of electronic components, and the one or more frames. At least a portion of an outer side surface of the encapsulant is coplanar on the same level as at least a portion of an outer side surface of at least one of the one or more frames.