公开(公告)号：US09202844B2

公开(公告)日：2015-12-01

申请号：US13966423

申请日：2013-08-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jong Han ,  Yoon-Goo Kang ,  Won-Seok Yoo ,  Kong-Soo Lee ,  Han-Jin Lim ,  Seong-Hoon Jeong

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144

Abstract: A semiconductor device includes a lower interconnection having second conductivity-type impurities on a substrate having first conductivity-type impurities. A switching device is on the lower interconnection. A first blocking layer is provided between the lower interconnection and the switching device. The first blocking layer includes carbon (C), germanium (Ge), or a combination thereof. A second blocking layer may be provided between the substrate and the lower interconnection.

Abstract translation: 半导体器件包括在具有第一导电型杂质的衬底上的具有第二导电类型杂质的下互连。 开关装置在较低的互连上。 第一阻挡层设置在下互连和开关器件之间。 第一阻挡层包括碳（C），锗（Ge）或其组合。 第二阻挡层可以设置在基板和下部互连件之间。

公开(公告)号：US20140158964A1

公开(公告)日：2014-06-12

申请号：US13966423

申请日：2013-08-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae-Jong HAN ,  Yoon-Goo Kang ,  Won-Seok Yoo ,  Kong-Soo Lee ,  Han-Jin Lim ,  Seong-Hoon Jeong

IPC: H01L45/00

CPC classification number: H01L27/2409 ,  H01L27/2463 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/143 ,  H01L45/144

Abstract: A semiconductor device includes a lower interconnection having second conductivity-type impurities on a substrate having first conductivity-type impurities. A switching device is on the lower interconnection. A first blocking layer is provided between the lower interconnection and the switching device. The first blocking layer includes carbon (C), germanium (Ge), or a combination thereof. A second blocking layer may be provided between the substrate and the lower interconnection.

Abstract translation: 半导体器件包括在具有第一导电型杂质的衬底上的具有第二导电类型杂质的下互连。 开关装置在较低的互连上。 第一阻挡层设置在下互连和开关器件之间。 第一阻挡层包括碳（C），锗（Ge）或其组合。 第二阻挡层可以设置在基板和下部互连件之间。

公开(公告)号：US20150124521A1

公开(公告)日：2015-05-07

申请号：US14297220

申请日：2014-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han-Jin Lim ,  Won-Seok Yoo ,  Seok-Woo Nam

IPC: H01L27/108 ,  G11C11/4063

CPC classification number: H01L27/10814 ,  H01L27/10823 ,  H01L27/10855

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes an active region defined by a device isolation layer formed in a cell region, a transistor including a buried gate in the active region, a metal contact formed on the active region positioned at one side of the buried gate, a landing pad on the metal contact, a capacitor on the landing pad and electrically connected to the active region, and a metal oxide layer between the metal contact and the active region.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括由形成在单元区域中的器件隔离层限定的有源区，在有源区中包括掩埋栅的晶体管，形成在位于掩埋栅的一侧的有源区上的金属接触， 在金属接触件上，在着陆焊盘上形成电连接到有源区的电容器，以及在金属触点和有源区之间的金属氧化物层。

公开(公告)号：US09153590B2

公开(公告)日：2015-10-06

申请号：US14297220

申请日：2014-06-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Han-Jin Lim ,  Won-Seok Yoo ,  Seok-Woo Nam

IPC: G11C11/00 ,  H01L27/108

CPC classification number: H01L27/10814 ,  H01L27/10823 ,  H01L27/10855

Abstract: A semiconductor device and a method of fabricating the same are provided. The semiconductor device includes an active region defined by a device isolation layer formed in a cell region, a transistor including a buried gate in the active region, a metal contact formed on the active region positioned at one side of the buried gate, a landing pad on the metal contact, a capacitor on the landing pad and electrically connected to the active region, and a metal oxide layer between the metal contact and the active region.

Abstract translation: 提供半导体器件及其制造方法。 半导体器件包括由形成在单元区域中的器件隔离层限定的有源区，在有源区中包括掩埋栅的晶体管，形成在位于掩埋栅的一侧的有源区上的金属接触， 在金属接触件上，在着陆焊盘上形成电连接到有源区的电容器，以及在金属触点和有源区之间的金属氧化物层。