公开(公告)号：US20240088006A1

公开(公告)日：2024-03-14

申请号：US18317521

申请日：2023-05-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Sangcheon PARK ,  Dongwoo KANG ,  Unbyoung KANG ,  Soohwan LEE ,  Hyunchul JUNG ,  Youngkun JEE

IPC: H01L23/498 ,  H01L23/00 ,  H01L23/538

CPC classification number: H01L23/49827 ,  H01L23/5389 ,  H01L24/06 ,  H01L24/32 ,  H01L2224/0401 ,  H01L2224/06515 ,  H01L2224/32235 ,  H01L2924/1434

Abstract: Provided is a semiconductor package including a substrate including a first surface and a second surface opposite to the first surface, a connecting circuit arranged on the first surface of the substrate, a through silicon via (TSV) structure penetrating the substrate, a first passivation layer arranged on the connecting circuit, a second passivation layer arranged on the second surface, a first bumping pad arranged inside the first passivation layer, and a second bumping pad arranged inside the second passivation layer, wherein the first bumping pad includes a first pad plug, and a first seed layer surrounding a lower surface and sidewalls of the first pad plug, wherein the second bumping pad includes a second pad plug, and a second seed layer surrounding an upper surface and sidewalls of the second pad plug, and wherein the first seed layer and the second seed layer include materials having different reactivities to water.

公开(公告)号：US20210057380A1

公开(公告)日：2021-02-25

申请号：US16816593

申请日：2020-03-12

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Sunchul KIM ,  Kyungsuk OH ,  Taehun KIM ,  Pyoungwan KIM ,  Soohwan LEE

IPC: H01L25/065 ,  H01L23/367 ,  H01L23/31 ,  H01L25/00

Abstract: A semiconductor package includes a package substrate, a first semiconductor chip disposed on the package substrate, at least one second semiconductor chip disposed on a region of an upper surface of the first semiconductor chip, a heat dissipation member disposed in another region of the upper surface of the first semiconductor chip and at least a region of an upper surface of the second semiconductor chip, and having an upper surface in which at least one trench is formed, and a molding member covering the first semiconductor chip, the second semiconductor chip, an upper surface of the package substrate, and side surfaces of the heat dissipation member, and filling the at least one trench while exposing the upper surface of the heat dissipation member.