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公开(公告)号:US20240395501A1
公开(公告)日:2024-11-28
申请号:US18642124
申请日:2024-04-22
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Hyojin PARK , Songyun KANG , Jiyun JU
IPC: H01J37/32
Abstract: An inductively coupled plasma processing apparatus includes a main body having an internal space; a chamber in the internal space of the main body and having an open upper side and an open lower side; a window unit coupled to an upper portion of the chamber to form a processing space; and a coil in an upper portion of the window unit, wherein the coil is configured to form an electromagnetic field. The main body includes a substrate installation portion configured to receive a substrate so that the substrate is below the chamber. The window unit includes a plurality of windows, and each of the plurality of windows has a respective different thickness and/or a respective different material.
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公开(公告)号:US20230052061A1
公开(公告)日:2023-02-16
申请号:US17696277
申请日:2022-03-16
Applicant: Samsung Electronics Co., Ltd.
Inventor: Hyojin PARK , Songyun KANG , Sung Yong PARK , Keon-Woo KIM
IPC: B24B49/18 , B24B37/30 , B24B37/04 , B24B53/017
Abstract: Disclosed is a substrate polishing method comprising placing a substrate into a substrate polishing apparatus, rotating each of the substrate and a polishing pad of the substrate polishing apparatus, allowing a bottom surface of the substrate to contact a top surface of the polishing pad, and determining whether the polishing pad would benefit from maintenance. The polishing pad includes a plurality of annular regions that are homocentric with a central point of the top surface of the polishing pad. The step of determining whether the polishing pad would benefit from maintenance includes ascertaining a state of the bottom surface of the substrate, and selecting one of the plurality of annular regions by using information about the state of the bottom surface of the substrate. The one of the plurality of annular regions would benefit from maintenance.
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公开(公告)号:US20250022693A1
公开(公告)日:2025-01-16
申请号:US18428510
申请日:2024-01-31
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: Iksu BYUN , Songyun KANG , Youngrok KWON
IPC: H01J37/32 , H01L21/683
Abstract: An electrostatic chuck may include a body, a body; an internal electrode in the body, wherein the internal electrode is configured to generate an electrostatic force when a voltage is applied to the internal electrode; and a coating layer on an outer surface of the body, wherein the coating layer comprises a film forming material including a silicon-containing material.
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公开(公告)号:US20250140568A1
公开(公告)日:2025-05-01
申请号:US18640322
申请日:2024-04-19
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor: SangHyuk YOO , Songyun KANG , Jiwon SON
IPC: H01L21/3115 , H01L21/02 , H01L21/311
Abstract: The present disclosure relates to methods of manufacturing semiconductor devices, and a method for manufacturing a semiconductor device according to an embodiment comprises: forming an insulating layer including a silicon compound on a substrate; forming a trench by recessing a portion of the insulating layer toward the substrate, wherein the trench is adjacent a first portion of the insulating layer and a second portion of the insulating layer; implanting a first impurity with a first concentration in the first portion of the insulating layer; implanting a second impurity with a second concentration in the second portion of the insulating layer, wherein the implanting the first impurity and the implanting the second impurity are performed simultaneously; and etching the first portion of the insulating layer after the implanting the first impurity, wherein the first impurity and the second impurity each include at least one of boron and arsenic.
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公开(公告)号:US20240162017A1
公开(公告)日:2024-05-16
申请号:US18327458
申请日:2023-06-01
Applicant: Samsung Electronics Co., Ltd.
Inventor: Heewon MIN , Juho KIM , Dongyun YEO , Kuihyun YOON , Seungbin LIM , Songyun KANG , Youngrok KWON
IPC: H01J37/32
CPC classification number: H01J37/32724 , H01J2237/002 , H01J2237/2007 , H01J2237/334
Abstract: A substrate supporting device may include a cooling plate including a cooling hole, a thermal-insulation plate on the cooling plate, and a chucking plate placed on the thermal-insulation plate. The chucking plate may include a heater. The thermal-insulation plate may include an adiabatic space, which is recessed from a top surface of the thermal-insulation plate by a depth in a downward direction. The cooling plate may include a connection hole, which vertically extends and is connected to the adiabatic space.
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公开(公告)号:US20230230840A1
公开(公告)日:2023-07-20
申请号:US17874766
申请日:2022-07-27
Applicant: Samsung Electronics Co., Ltd.
Inventor: Dongkyu LEE , Songyun KANG , Hiroshi SASAKI , Younseon WANG
IPC: H01L21/3065 , H01L21/311 , H01J37/32
CPC classification number: H01L21/3065 , H01L21/31116 , H01J37/32449 , H01J2237/334
Abstract: A method of fabricating a semiconductor device comprises forming a mold layer on a substrate, forming a hardmask layer on the mold layer such that a portion of the mold layer is exposed, and using the hardmask layer to perform on the mold layer a cryogenic etching process. The cryogenic etching process includes supplying a chamber with a process gas including first and second process gases, and generating a plasma from the process gas. Radicals of the first process gas etch the exposed portion of the mold layer. Ammonium salt is produced based on the radicals etching the exposed portion of the mold layer. The second process gas includes an R—OH compound. The R is hydrogen, a C1 to C5 alkyl group, a C2 to C6 alkenyl group, a C2 to C6 alkynyl group, or a phenyl group. The second process gas reduces a production rate of the ammonium salt.
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