公开(公告)号：US20240258205A1

公开(公告)日：2024-08-01

申请号：US18498020

申请日：2023-10-30

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hoyun Jeon ,  Seungyong Yoo

IPC: H01L23/48 ,  H01L27/088 ,  H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L23/481 ,  H01L27/088 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/66439 ,  H01L29/775 ,  H01L29/78696

Abstract: An integrated circuit device includes a lower insulating structure disposed over a substrate, a lower wiring structure that passes through the lower insulating structure in a vertical direction, an upper insulating structure disposed on the lower insulating structure, and an upper wiring structure that passes through the upper insulating structure in the vertical direction and contacts the lower wiring structure. The upper wiring structure includes an upper metal plug and an upper conductive barrier structure that surrounds a sidewall and a lower surface of the upper metal plug. The upper conductive barrier structure includes a first barrier portion that faces a sidewall of the upper insulating structure, and a second barrier portion interposed between the lower wiring structure and the upper metal plug. The first barrier portion and the second barrier portion have different structures from each other.

公开(公告)号：US11587867B2

公开(公告)日：2023-02-21

申请号：US17235984

申请日：2021-04-21

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongjin Lee ,  Kyungwook Kim ,  Rakhwan Kim ,  Seungyong Yoo ,  Eun-Ji Jung

IPC: H01L23/522 ,  H01L23/532 ,  H01L29/45

Abstract: Semiconductor devices includes a first interlayer insulating layer, a lower interconnection line in the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer. The upper interconnection line includes a via portion extending through the etch stop layer and contacting the lower interconnection line. The via portion includes a barrier pattern and a conductive pattern. The barrier pattern includes a first barrier layer between the conductive pattern and the second interlayer insulating layer, and a second barrier layer between the conductive pattern and the lower interconnection line. A resistivity of the first barrier layer is greater than that of the second barrier layer. A nitrogen concentration of the first barrier layer is greater than that of the second barrier layer.

公开(公告)号：US20230064127A1

公开(公告)日：2023-03-02

申请号：US18053487

申请日：2022-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： JONGJIN LEE ,  Kyungwook Kim ,  Rakhwan Kim ,  Seungyong Yoo ,  Eun-Ji Jung

IPC: H01L23/522 ,  H01L23/532 ,  H01L29/45

Abstract: Semiconductor devices includes a first interlayer insulating layer, a lower interconnection line in the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer. The upper interconnection line includes a via portion extending through the etch stop layer and contacting the lower interconnection line. The via portion includes a barrier pattern and a conductive pattern. The barrier pattern includes a first barrier layer between the conductive pattern and the second interlayer insulating layer, and a second barrier layer between the conductive pattern and the lower interconnection line. A resistivity of the first barrier layer is greater than that of the second barrier layer. A nitrogen concentration of the first barrier layer is greater than that of the second barrier layer.

公开(公告)号：US20240203883A1

公开(公告)日：2024-06-20

申请号：US18351888

申请日：2023-07-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seungyong Yoo ,  Eunji Jung

IPC: H01L23/532 ,  H01L21/768 ,  H01L23/522

CPC classification number: H01L23/53238 ,  H01L21/76804 ,  H01L21/76832 ,  H01L21/76846 ,  H01L21/76882 ,  H01L23/5226 ,  H01L23/53295

Abstract: An integrated circuit device includes an insulating structure above a substrate, and an interconnection structure penetrating the insulating structure in a first direction and including a first local protrusion portion. The first local protrusion portion protrudes outward in a second direction perpendicular to the first direction from a position adjacent to a lower surface of the insulating structure. The interconnection structure further includes a metal plug including a first metal, and a plurality of metal-containing particles including a second metal that is different from the first metal. The plurality of metal-containing particles are irregularly dispersed in a lower plug region of the metal plug, and the lower plug region is spaced apart from an upper surface of the metal plug and includes the first local protrusion portion.

公开(公告)号：US11967554B2

公开(公告)日：2024-04-23

申请号：US18053487

申请日：2022-11-08

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jongjin Lee ,  Kyungwook Kim ,  Rakhwan Kim ,  Seungyong Yoo ,  Eun-Ji Jung

IPC: H01L23/522 ,  H01L23/532 ,  H01L29/45

CPC classification number: H01L23/5226 ,  H01L23/53238 ,  H01L23/53252 ,  H01L23/53266 ,  H01L29/45

Abstract: Semiconductor devices includes a first interlayer insulating layer, a lower interconnection line in the first interlayer insulating layer, an etch stop layer on the first interlayer insulating layer and the lower interconnection line, a second interlayer insulating layer on the etch stop layer, and an upper interconnection line in the second interlayer insulating layer. The upper interconnection line includes a via portion extending through the etch stop layer and contacting the lower interconnection line. The via portion includes a barrier pattern and a conductive pattern. The barrier pattern includes a first barrier layer between the conductive pattern and the second interlayer insulating layer, and a second barrier layer between the conductive pattern and the lower interconnection line. A resistivity of the first barrier layer is greater than that of the second barrier layer. A nitrogen concentration of the first barrier layer is greater than that of the second barrier layer.