公开(公告)号：US10679972B2

公开(公告)日：2020-06-09

申请号：US16193318

申请日：2018-11-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won-Gil Han ,  Byong-Joo Kim ,  Yong-Je Lee ,  Jae-Heung Lee ,  Seung-Weon Ha

IPC: H01L25/065 ,  H01L23/00 ,  H01L25/00

Abstract: A multi-chip package includes a package substrate including a first substrate pad, a first group of semiconductor chips stacked on the package substrate, each of the first group of the semiconductor chips including bonding pads, first stud bumps arranged on the bonding pads of the first group of the semiconductor chips except for a lowermost semiconductor chip in the first group, a first conductive wire downwardly extended from the bonding pad of the lowermost semiconductor chip in the first group and connected to the first substrate pad, and a second conductive wire upwardly extended from the bonding pad of the lowermost semiconductor chip in the first group and sequentially connected to the first stud bumps.

公开(公告)号：US10147706B2

公开(公告)日：2018-12-04

申请号：US15623891

申请日：2017-06-15

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Won-Gil Han ,  Byong-Joo Kim ,  Yong-Je Lee ,  Jae-Heung Lee ,  Seung-Weon Ha

IPC: H01L25/065 ,  H01L23/00

Abstract: A multi-chip package includes a package substrate including a first substrate pad, a first group of semiconductor chips stacked on the package substrate, each of the first group of the semiconductor chips including bonding pads, first stud bumps arranged on the bonding pads of the first group of the semiconductor chips except for a lowermost semiconductor chip in the first group, a first conductive wire downwardly extended from the bonding pad of the lowermost semiconductor chip in the first group and connected to the first substrate pad, and a second conductive wire upwardly extended from the bonding pad of the lowermost semiconductor chip in the first group and sequentially connected to the first stud bumps.

公开(公告)号：US09500599B2

公开(公告)日：2016-11-22

申请号：US14603809

申请日：2015-01-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youn-Jo Mun ,  Hoon Sohn ,  Sang-Young Kim ,  Yun-Kyu An ,  Sung-Il Cho ,  Seung-Weon Ha ,  Jin-Yeol Yang ,  Soon-Kyu Hwang

IPC: G01N21/95 ,  G01J5/10 ,  G01J5/08 ,  H04N5/33 ,  G01J5/00

CPC classification number: G01N21/9501 ,  G01J5/0007 ,  G01J5/025 ,  G01J5/026 ,  G01J5/047 ,  G01J5/0803 ,  G01J5/0806 ,  G01J5/0831 ,  G01J5/0896 ,  G01J5/10 ,  G01J2005/0048 ,  G01J2005/0051 ,  G01J2005/0077 ,  G01J2005/0081 ,  G01N2201/06113 ,  H04N5/33

Abstract: A surface inspection apparatus and method of inspecting chip surfaces includes a laser generator that generates a periodic CW laser and is transformed into an inspection laser beam having a beam size smaller than a surface size of the chip. Thus, the inspection laser beam is irradiated onto a plurality of the semiconductor chips such that the semiconductor chips are partially and simultaneously heated. Thermal waves are detected in response to the inspection laser beam and thermal images are generated corresponding to the thermal waves. A surface image is generated by a lock-in thermography technique and hold exponent analysis of the thermal image, thereby generating surface image in which a surface defect is included. Time and accuracy of the surface inspection process is improved.

Abstract translation: 表面检查装置和检查芯片表面的方法包括产生周期性CW激光并被转换成具有小于芯片的表面尺寸的光束尺寸的检查激光束的激光发生器。 因此，将检查激光束照射到多个半导体芯片上，使得半导体芯片被部分同时加热。 响应于检查激光束检测热波，并且对应于热波产生热图像。 通过锁定热成像技术产生表面图像，并保持热图像的指数分析，从而产生其中包括表面缺陷的表面图像。 表面检查过程的时间和精度得到提高。