公开(公告)号：US11910600B2

公开(公告)日：2024-02-20

申请号：US17037532

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonghun Jeong ,  Byoungil Lee ,  Bosuk Kang

IPC: H10B43/27 ,  H01L23/532 ,  H01L23/528 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

CPC classification number: H10B43/27 ,  H01L23/5283 ,  H01L23/535 ,  H01L23/53257 ,  H01L23/53271 ,  H10B41/27 ,  H10B41/41 ,  H10B43/40

Abstract: A three-dimensional nonvolatile memory device includes: a substrate including a cell area and an extension area having a staircase structure; a vertical structure on the substrate; a stacking structure having electrode layers and interlayer insulating layers on the substrate; a separation insulating layer on the substrate and separating the electrode layers; and a through-via wiring area adjacent to the cell or extension area and having through-vias passing through the substrate, wherein the cell area includes a main cell area in which normal cells are arranged and an edge cell area, the separation insulating layer includes a main separation insulating layer in the main cell area and an edge separation insulating layer in the edge cell area, and a lower surface of the main separation insulating layer is higher than the upper surface of the substrate and has a different depth than a lower surface of the edge separation insulating layer.

公开(公告)号：US10008023B2

公开(公告)日：2018-06-26

申请号：US15145494

申请日：2016-05-03

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonghun Jeong ,  Sangheon Lee ,  Sunmin Kwon ,  Hoyoung Kim ,  Heejun Shim

IPC: G06T15/04 ,  G06T7/60 ,  G06T7/00 ,  G06K9/62 ,  G06T7/90

CPC classification number: G06T15/04 ,  G06K9/6201 ,  G06T7/00 ,  G06T7/60 ,  G06T7/90 ,  G06T2200/04 ,  G06T2207/20024 ,  G06T2210/36

Abstract: A method and a device for texture filtering include determining an upper mipmap and a lower mipmap based on a level of detail (LOD) value corresponding to a quad, obtaining first color values corresponding to the upper mipmap, obtaining second color values corresponding to the lower mipmap, and obtaining third color values of the pixels of the quad by using linear interpolation, based on the obtained first and second color values.

公开(公告)号：US12268006B2

公开(公告)日：2025-04-01

申请号：US17829011

申请日：2022-05-31

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Bosuk Kang ,  Joonhee Lee ,  Seonghun Jeong

IPC: H01L27/11575 ,  H10B41/27 ,  H10B41/50 ,  H10B43/27 ,  H10B43/50

Abstract: A semiconductor device includes a substrate having a first region and a second region, gate electrodes spaced apart from each other in a first direction, perpendicular to an upper surface of the substrate, and extend in a second direction, and have different lengths on the second region, channel structures that penetrate the gate electrodes, extend in the first direction, and respectively include a channel layer on the first region, support structures that penetrate the gate electrodes and extend in the first direction on the second region, and a separation region that penetrates the gate electrodes and extend in the second direction. The substrate has a recess region that overlaps the separation region in the first direction and extends downward from an upper surface in the second region, adjacent to the first region. The separation region has a protrusion that protrudes downward to correspond to the recess region.

公开(公告)号：US11622098B2

公开(公告)日：2023-04-04

申请号：US17347406

申请日：2021-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonghun Jeong ,  Hyoyoung Kim ,  Youngjin Park

IPC: H04N13/275 ,  H04N13/122 ,  H04N13/293

Abstract: An electronic device is disclosed. The present electronic device comprises a display, a processor electrically connected with the display so as to control the display, and a memory electrically connected with the processor, wherein the memory includes at least one command, and the processor, by executing at least one command, acquires a plurality of object images corresponding to a plurality of objects in a two-dimensional image, acquires a plurality of three-dimensional modeling images corresponding to the plurality of object images and information related to the plurality of objects by applying the plurality of object images to a plurality of network models, and displays, on the display, the three-dimensional images including the plurality of three-dimensional modeling images on the basis of the information related to the plurality of objects and the location information about the plurality of objects in the two-dimensional image.

公开(公告)号：US11849289B2

公开(公告)日：2023-12-19

申请号：US17471943

申请日：2021-09-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seunghwan Ko ,  Seonghun Jeong ,  Kiyean Kim ,  Dongjin Kim ,  Yeongkwan Kim ,  Joonho Kim ,  Taeseon Kim ,  Hyeonhyang Kim ,  Jungkeun Park

IPC: H04R29/00 ,  H04R1/10

CPC classification number: H04R29/001 ,  H04R1/1016 ,  H04R29/004 ,  H04R2420/07

Abstract: According to an embodiment, an electronic device comprises a memory, a communication module, a first speaker including at least one vibration component, at least one first microphone, and a processor configured to output a first sound having a predetermined frequency via the first speaker when a closed space is formed with the electronic device mounted on a cradle, obtain a third sound, which is a reflection of the first sound in the closed space, via the at least one first microphone, obtain a fourth sound, which is a reflection of a second sound in the closed space, via the at least one first microphone, the second sound output from a second speaker included in an external electronic device located in the closed space, and identify whether the performance of the first speaker, the at least one first microphone, and the second speaker is normal, based on the third sound and the fourth sound.

公开(公告)号：US12120874B2

公开(公告)日：2024-10-15

申请号：US17583265

申请日：2022-01-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonghun Jeong

IPC: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

CPC classification number: H10B43/27 ,  H10B41/10 ,  H10B41/27 ,  H10B41/35 ,  H10B41/40 ,  H10B43/10 ,  H10B43/35 ,  H10B43/40

Abstract: Semiconductor devices may include a gate stack including electrode layers stacked alternately with insulating layers and channel structures in the electrode layers and the insulating layers; a cell region insulating layer and an upper support layer on the gate stack; and a separation region in the gate stack and the cell region insulating layer. The separation regions may include a first separation region in the upper support layer and a second separation region below the upper support layer. The first separation region may include a first region in the upper support layer, a second region in the cell region insulating layer, and a third region in the gate electrode layers. The first separation region may further include has a first bend portion in the second region and a second bend portion that may be higher than the first bend portion and uppermost surfaces of the channel structures.

公开(公告)号：US20240215253A1

公开(公告)日：2024-06-27

申请号：US18601027

申请日：2024-03-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonghun Jeong ,  Byoungil Lee ,  Bosuk Kang ,  Joonhee Lee

IPC: H10B43/50 ,  H01L21/768 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B41/50 ,  H10B43/27 ,  H10B43/40

CPC classification number: H10B43/50 ,  H01L21/76805 ,  H01L21/76895 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B41/50 ,  H10B43/27 ,  H10B43/40

Abstract: A semiconductor device includes a peripheral circuit structure including a first substrate and circuit elements on the first substrate; and a memory cell structure including a second substrate on the first substrate, a first horizontal conductive layer on the second substrate, a second horizontal conductive layer on the first horizontal conductive layer, gate electrodes spaced apart from each other and stacked on the second horizontal conductive layer, channel structures penetrating through the gate electrodes, and separation regions penetrating the gate electrodes, extending, and spaced apart from each other. The semiconductor device has a through-wiring region including a through-contact plug electrically connecting the memory cell structure and the peripheral circuit structure, the separation regions include first separation regions adjacent to the through-contact plug, and the first separation regions penetrate through the second horizontal conductive layer and are spaced apart from the first horizontal conductive layer.

公开(公告)号：US11963362B2

公开(公告)日：2024-04-16

申请号：US17202992

申请日：2021-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Seonghun Jeong ,  Byoungil Lee ,  Bosuk Kang ,  Joonhee Lee

IPC: H01L21/76 ,  H01L21/768 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B41/50 ,  H10B43/27 ,  H10B43/40 ,  H10B43/50

CPC classification number: H10B43/50 ,  H01L21/76805 ,  H01L21/76895 ,  H01L23/535 ,  H10B41/27 ,  H10B41/41 ,  H10B41/50 ,  H10B43/27 ,  H10B43/40

Abstract: A semiconductor device includes a peripheral circuit structure including a first substrate and circuit elements on the first substrate; and a memory cell structure including a second substrate on the first substrate, a first horizontal conductive layer on the second substrate, a second horizontal conductive layer on the first horizontal conductive layer, gate electrodes spaced apart from each other and stacked on the second horizontal conductive layer, channel structures penetrating through the gate electrodes, and separation regions penetrating the gate electrodes, extending, and spaced apart from each other. The semiconductor device has a through-wiring region including a through-contact plug electrically connecting the memory cell structure and the peripheral circuit structure, the separation regions include first separation regions adjacent to the through-contact plug, and the first separation regions penetrate through the second horizontal conductive layer and are spaced apart from the first horizontal conductive layer.

公开(公告)号：US11501487B2

公开(公告)日：2022-11-15

申请号：US17293715

申请日：2019-10-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Youngjin Park ,  Hyoyoung Kim ,  Seonghun Jeong

IPC: G06T15/00 ,  G06T15/20 ,  G06T7/70 ,  G06T19/20

Abstract: An electronic device is disclosed. The present electronic device includes a display, a processor electronically connected to the display so as to control the display, and a memory electronically connected to the processor. The memory stores instructions causing the processor to control the display to display a 3D modeling image acquired by applying an input 2D image to a learning network model configured to convert the input 2D image into a 3D modeling image, and the learning network model is obtained by learning using a 3D pose acquired by rending virtual 3D modeling data and a 2D image corresponding to the 3D pose.

公开(公告)号：US20210257384A1

公开(公告)日：2021-08-19

申请号：US17037532

申请日：2020-09-29

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Seonghun Jeong ,  Byoungil Lee ,  Bosuk KANG

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11529 ,  H01L27/11573 ,  H01L23/528 ,  H01L23/535 ,  H01L23/532

Abstract: A three-dimensional nonvolatile memory device includes: a substrate including a cell area and an extension area having a staircase structure; a vertical structure on the substrate; a stacking structure having electrode layers and interlayer insulating layers on the substrate; a separation insulating layer on the substrate and separating the electrode layers; and a through-via wiring area adjacent to the cell or extension area and having through-vias passing through the substrate, wherein the cell area includes a main cell area in which normal cells are arranged and an edge cell area, the separation insulating layer includes a main separation insulating layer in the main cell area and an edge separation insulating layer in the edge cell area, and a lower surface of the main separation insulating layer is higher than the upper surface of the substrate and has a different depth than a lower surface of the edge separation insulating layer.