公开(公告)号：US20200027925A1

公开(公告)日：2020-01-23

申请号：US16354545

申请日：2019-03-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： SUNG-HO EUN ,  Daehwan Kang ,  Sungwon Kim ,  Youngbae Kim ,  Seokjae Won

IPC: H01L27/24 ,  H01L45/00

Abstract: A variable resistance non-volatile memory device can include a semiconductor substrate and a plurality of first conductive lines each extending in a first direction perpendicular to the semiconductor substrate and spaced apart in a second direction on the semiconductor substrate. A second conductive line can extend in the second direction parallel to the semiconductor substrate on a first side of the plurality of first conductive lines and a third conductive line can extend in the second direction parallel to the semiconductor substrate on a second side of the plurality of first conductive lines opposite the first side of the plurality of first conductive lines. A plurality of first non-volatile memory cells can be on the first side of the plurality of first conductive lines and each can be coupled to the second conductive line and to a respective one of the plurality of first conductive lines, where each of the plurality of first non-volatile memory cells can include a switching element, a variable resistance element, and an electrode arranged in a first sequence. A plurality of second non-volatile memory cells can be on the second side of the plurality of first conductive lines and each can be coupled to the third conductive line and to a respective one of the plurality of first conductive lines, wherein each of the plurality of second non-volatile memory cells includes a switching element, a variable resistance element, and an electrode that are arranged in a second sequence, wherein the first sequence and the second sequence are symmetrical with one another about the plurality of first conductive lines.

公开(公告)号：US20170243922A1

公开(公告)日：2017-08-24

申请号：US15297687

申请日：2016-10-19

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： SUNG-HO EUN

IPC: H01L27/24 ,  H01L45/00 ,  H01L23/528

CPC classification number: H01L27/2463 ,  H01L23/528 ,  H01L27/2427 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/124 ,  H01L45/126 ,  H01L45/142 ,  H01L45/143 ,  H01L45/144 ,  H01L45/1683 ,  H01L45/1691

Abstract: A variable resistance memory device including a substrate, a first insulation layer disposed on the substrate, first and second conductive lines, and memory units. The first conductive lines are arranged in a first direction on the first insulation layer and extend in a second direction. The second conductive lines are disposed over the first conductive lines, are arranged in the second direction, and extend in the first direction. The memory units are disposed in each area between the first and second conductive lines in a third direction and include a first electrode, a variable resistance pattern, a selection pattern, and a second electrode. The first electrode and the variable resistance pattern include a cross-section having an “L” shape. The variable resistance pattern contacts an upper surface of the first electrode. The second electrode is disposed on the variable resistance pattern. The selection pattern is disposed on the second electrode.

公开(公告)号：US20160358976A1

公开(公告)日：2016-12-08

申请号：US15083639

申请日：2016-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： SUNG-HO EUN

IPC: H01L27/24 ,  H01L45/00 ,  H01L27/22 ,  H01L43/02 ,  H01L43/10 ,  H01L23/528 ,  H01L43/08

CPC classification number: H01L27/2463 ,  H01L23/528 ,  H01L27/224 ,  H01L27/2409 ,  H01L27/2481 ,  H01L45/06 ,  H01L45/1233 ,  H01L45/144 ,  H01L45/1683

Abstract: A semiconductor device includes first conductive lines and first and second insulation patterns on a substrate, first structures spaced apart from each other on the first conductive lines, a variable resistance pattern on the first structures, and a second electrode on the variable resistance pattern. The first conductive lines extend in a first direction. The first structures include a switching pattern and a first electrode sequentially stacked. The first insulation pattern fills a space between the first structures in a second direction and the first insulation pattern has a first top surface higher than a top surface of the first structures. The second insulation pattern fills a space between the first structures in the first direction, and the second insulation pattern has a second top surface higher than a top surface of the first structures. The variable resistance pattern fills an opening defined by the first and second insulation patterns.

Abstract translation: 半导体器件包括第一导电线以及衬底上的第一和第二绝缘图案，在第一导电线上彼此间隔开的第一结构，第一结构上的可变电阻图案，以及可变电阻图案上的第二电极。 第一导线沿第一方向延伸。 第一结构包括顺序层叠的开关图案和第一电极。 第一绝缘图案在第二方向上填充第一结构之间的空间，并且第一绝缘图案具有高于第一结构的顶表面的第一顶表面。 第二绝缘图案在第一方向上填充第一结构之间的空间，并且第二绝缘图案具有比第一结构的顶表面高的第二顶表面。 可变电阻图案填充由第一和第二绝缘图案限定的开口。