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    BOOTSTRAP CIRCUIT AND A SAMPLING CIRCUIT USING THE SAME
    1.
    发明申请
    BOOTSTRAP CIRCUIT AND A SAMPLING CIRCUIT USING THE SAME 审中-公开

    公开(公告)号：US20200350900A1

    公开(公告)日：2020-11-05

    申请号：US16933057

    申请日：2020-07-20

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Eun Seok SHIN ,  Jung Ho LEE ,  Michael CHOI

    IPC: H03K17/06 ,  H02M3/07 ,  G11C27/02

    Abstract: A bootstrap circuit including: a charge pump; a power unit including a bootstrap capacitor, wherein the bootstrap capacitor is charged using an output voltage of the charge pump; and a switch driver for generating a bootstrap signal based on a clock signal and an analog signal, wherein the analog signal is input to an analog switch, the switch driver for controlling the analog switch using the bootstrap signal, and including a first body switch connected between an input terminal and a body of the analog switch.

    ANALOG-TO-DIGITAL CONVERTER
    2.
    发明申请
    ANALOG-TO-DIGITAL CONVERTER 有权

    公开(公告)号：US20220190840A1

    公开(公告)日：2022-06-16

    申请号：US17406193

    申请日：2021-08-19

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Kyoungjun MOON ,  Dongryeol OH ,  Younghyo PARK ,  Youngjae CHO ,  Michael CHOI

    IPC: H03M1/46 ,  H03M1/12 ,  H03M1/06

    Abstract: An analog-to-digital converter (ADC) includes a coarse ADC that receives an analog input voltage, generates a first digital signal based on the analog input voltage using a successive approximation register (SAR) method, and outputs a residual voltage remaining after the first digital signal is generated. The ADC further includes an amplifier that receives the residual voltage and a test voltage, generates a residual current by amplifying the residual voltage by a predetermined gain, and generates a test current by amplifying the test voltage by the gain. The ADC further includes a fine ADC that receives the residual current and generates a second digital signal based on the residual current using the SAR method, and an auxiliary path that receives the test current and generates a gain correction signal based on the test current. The gain of the amplifier is adjusted based on the gain correction signal.

    ANALOG-TO-DIGITAL CONVERTER
    5.
    发明申请
    ANALOG-TO-DIGITAL CONVERTER 有权

    公开(公告)号：US20250096811A1

    公开(公告)日：2025-03-20

    申请号：US18627940

    申请日：2024-04-05

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyung Dong ROH ,  Kyung Hoon LEE ,  Woong Taek LIM ,  Young Jae CHO ,  Michael CHOI

    IPC: H03M1/12

    Abstract: An analog-to-digital converter is provided. An analog-to-digital converter comprises an interleaver receiving and processing an input signal that is an analog signal and a plurality of sub-ADCs, wherein the interleaver includes a reference circuit outputting a second voltage based on a first voltage, a high-pass filter receiving the second voltage and outputting a first signal obtained by changing a common mode voltage of the input signal to the second voltage, a sampling circuit generating a second signal obtained by sampling an alternate current component of the first signal, and a buffer outputting a third signal obtained by buffering the second signal by using a buffering circuit, and the sub-ADC converts the third signal into a digital signal by using the first voltage.

    MULTIPLEXER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME
    8.
    发明申请
    MULTIPLEXER AND SEMICONDUCTOR DEVICE INCLUDING THE SAME 有权

    公开(公告)号：US20220166429A1

    公开(公告)日：2022-05-26

    申请号：US17387221

    申请日：2021-07-28

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Sangheon LEE ,  Woongtaek LIM ,  Jungho LEE ,  Youngjae CHO ,  Michael CHOI

    IPC: H03K17/693 ,  H03M1/12 ,  H02M3/07

    Abstract: A multiplexer includes a charging circuit; a plurality of sampling switches receiving a plurality of input signals; and a plurality of boosting circuits connected between the sampling switches and the charging circuit and sharing the charging circuit. First and second charging switches of the charging circuit are controlled by a first clock signal. Each of the boosting circuits includes a first boosting switch connected to a first node of the charging circuit and a gate of one of the sampling switches, a second boosting switch connected between a second node of the charging circuit and the one sampling switch, and a level shifter configured to control the first boosting switch and the second boosting switch in response to a second clock signal and a selection signal.

    JITTER MEASUREMENT CIRCUIT AND JITTER MEASUREMENT METHOD
    9.
    发明申请
    JITTER MEASUREMENT CIRCUIT AND JITTER MEASUREMENT METHOD 有权

    公开(公告)号：US20250123327A1

    公开(公告)日：2025-04-17

    申请号：US18823768

    申请日：2024-09-04

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyungdong ROH ,  Jihun CHOI ,  Jaedo KIM ,  Jeongjin ROH ,  Youngjae CHO ,  Michael CHOI

    IPC: G01R31/317

    Abstract: A jitter measurement circuit for measuring a jitter of an input signal, the jitter measurement circuit including: a multiplexer configured to output a first comparison signal or a second comparison signal in response to an output signal; a detecting circuit configured to output a detection signal corresponding to a phase difference between an output of the multiplexer and the input signal; a first adder configured to sum the detection signal and a feedback signal; an integrating circuit configured to integrate and output an output of the first adder; a feedback circuit configured to trim an output of the integrating circuit to generate the feedback signal; and a comparator configured to generate an output signal by comparing the output of the integrating circuit with a reference potential.

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