SEMICONDUCTOR PACKAGE INCLUDING ADHESIVE LAYER AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20230072616A1

    公开(公告)日:2023-03-09

    申请号:US17697243

    申请日:2022-03-17

    Abstract: A semiconductor package may include a first semiconductor chip, a second semiconductor chip spaced apart from the first semiconductor chip, an adhesive layer including an interposition portion and a side portion, and a molding layer. The molding layer may surround the first semiconductor chip, the second semiconductor chip, and the adhesive layer. The interposition portion may be between the first and second semiconductor chips. The side portion may contact a side surface of the first semiconductor chip and a side surface of the second semiconductor chip. A top surface of the side portion is curved, and an outer side surface of the side portion is flat.

    SEMICONDUCTOR PACKAGE INCLUDING ADHESIVE LAYER AND METHOD FOR MANUFACTURING THE SAME

    公开(公告)号:US20250125271A1

    公开(公告)日:2025-04-17

    申请号:US19001810

    申请日:2024-12-26

    Abstract: A semiconductor package may include a first semiconductor chip, a second semiconductor chip spaced apart from the first semiconductor chip, an adhesive layer including an interposition portion and a side portion, and a molding layer. The molding layer may surround the first semiconductor chip, the second semiconductor chip, and the adhesive layer. The interposition portion may be between the first and second semiconductor chips. The side portion may contact a side surface of the first semiconductor chip and a side surface of the second semiconductor chip. A top surface of the side portion is curved, and an outer side surface of the side portion is flat.

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