公开(公告)号：US09854672B2

公开(公告)日：2017-12-26

申请号：US14525830

申请日：2014-10-28

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jung-Hoon Ku ,  Yong-Woo Koo ,  Ki-Yong Kim

IPC: H05K1/11 ,  H05K1/02 ,  G01R31/04 ,  H05K7/02 ,  G02F1/1345 ,  H05K3/34 ,  H05K3/36

CPC classification number: H05K1/118 ,  G01R31/048 ,  G02F1/13452 ,  G02F2201/36 ,  H05K3/3452 ,  H05K3/363 ,  H05K2203/125 ,  H05K2203/308

Abstract: A printed circuit board includes a substrate and a plurality of pad forming regions disposed thereon. The plurality of pad forming regions are spaced apart from each other by a predetermined distance. A plurality of connection pads are disposed on a portion of the plurality of pad forming regions. The plurality of connection pads are configured to transmit or receive a signal to an external device or from the external device. The printed circuit board includes a path configured for the transportation of moisture therein.

公开(公告)号：US09190008B2

公开(公告)日：2015-11-17

申请号：US13940444

申请日：2013-07-12

Applicant: Samsung Display Co., Ltd.

Inventor： Ki-Hyun Pyun ,  Jang-Hoon Kwak ,  Jung-Hoon Ku ,  Jin-Ki Kim ,  Seung-Woon Shin ,  Jun-Ho Hwang

IPC: G09G3/36

CPC classification number: G09G3/3696 ,  G09G3/3677 ,  G09G2330/12

Abstract: A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.

Abstract translation: 栅极驱动模块包括栅极驱动器和栅极信号发生器。 栅极驱动器基于垂直启动控制信号，多个栅极时钟控制信号，栅极导通电压，第一栅极截止电压和第一栅极截止电压产生垂直起始信号，多个栅极时钟信号和多个反向栅极时钟信号，以及 第二栅极关断电压。 栅极时钟信号的数量为P.反向栅极时钟信号的数量为P.栅极时钟控制信号的数量为P.P为等于或大于2的正整数。 栅极信号发生器基于垂直起始信号，栅极时钟信号和反向栅极时钟信号产生栅极信号。

公开(公告)号：US20140253418A1

公开(公告)日：2014-09-11

申请号：US13940444

申请日：2013-07-12

Applicant: Samsung Display Co., Ltd.

Inventor： KI-HYUN PYUN ,  Jang-Hoon Kwak ,  Jung-Hoon Ku ,  Jin-Ki Kim ,  Seung-Woon Shin ,  Jun-HO Hwang

IPC: G09G3/36 ,  H03K17/00

CPC classification number: G09G3/3696 ,  G09G3/3677 ,  G09G2330/12

Abstract: A gate driving module includes a gate driver and a gate signal generator. The gate driver generates a vertical start signal, a plurality of gate clock signals and a plurality of inverse gate clock signals based on a vertical start control signal, a plurality of gate clock control signals, a gate on voltage, a first gate off voltage and a second gate off voltage. The number of the gate clock signals is P. The number of the inverse gate clock signals is P. The number of the gate clock control signals is P. P is a positive integer equal to or greater than two. The gate signal generator generates a gate signal based on the vertical start signal, the gate clock signals and the inverse gate clock signals.

Abstract translation: 栅极驱动模块包括栅极驱动器和栅极信号发生器。 栅极驱动器基于垂直启动控制信号，多个栅极时钟控制信号，栅极导通电压，第一栅极截止电压和第一栅极截止电压产生垂直起始信号，多个栅极时钟信号和多个反向栅极时钟信号，以及 第二栅极关断电压。 栅极时钟信号的数量为P.反向栅极时钟信号的数量为P.栅极时钟控制信号的数量为P.P为等于或大于2的正整数。 栅极信号发生器基于垂直起始信号，栅极时钟信号和反向栅极时钟信号产生栅极信号。