DEVICE WITH SYNCHRONOUS OUTPUT
    1.
    发明公开

    公开(公告)号:US20230162764A1

    公开(公告)日:2023-05-25

    申请号:US17902171

    申请日:2022-09-02

    CPC classification number: G11C7/1066 G11C7/222 H03K5/135 H03K5/1534

    Abstract: The present description concerns an electronic device including: a first input configured to receive a clock signal, coupled by a first input buffer to a first circuit; and at least an output coupled by an output buffer to the first circuit, the output buffer being synchronized on first edges of the clock signal, wherein the first input buffer includes a data input coupled to the first input and is configured to maintain the value on its output constant whatever the value on its data input during a duration following each first edge of the clock signal.

    Device with synchronous output
    2.
    发明授权

    公开(公告)号:US12230357B2

    公开(公告)日:2025-02-18

    申请号:US17902171

    申请日:2022-09-02

    Abstract: The present description concerns an electronic device including: a first input configured to receive a clock signal, coupled by a first input buffer to a first circuit; and at least an output coupled by an output buffer to the first circuit, the output buffer being synchronized on first edges of the clock signal, wherein the first input buffer includes a data input coupled to the first input and is configured to maintain the value on its output constant whatever the value on its data input during a duration following each first edge of the clock signal.

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