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    LDO OVERSHOOT PROTECTION
    1.
    发明申请
    LDO OVERSHOOT PROTECTION 有权

    公开(公告)号：US20210278868A1

    公开(公告)日：2021-09-09

    申请号：US16810639

    申请日：2020-03-05

    Applicant: STMicroelectronics S.r.l. ,  STMicroelectronics (Rousset) SAS

    Inventor： Michel Cuenca ,  Bruno Gailhard ,  Daniele Mangano

    IPC: G05F1/56

    Abstract: In an embodiment, a method includes: receiving a main supply voltage; generating a first regulated output voltage with a DC-DC converter; providing the main supply voltage to a driver of a control terminal of an output transistor of an LDO; receiving, at an input terminal of the LDO, the first regulated output voltage; generating, at an output terminal of the LDO, a second regulated output voltage from the first regulated output voltage; and when the main supply voltage falls below a predetermined threshold, discharging a capacitor coupled to the input terminal of the LDO by activating a switch coupled to the input terminal of the LDO.

    Electronic Switching Device with Reduction of Leakage Currents and Corresponding Control Method
    2.
    发明申请
    Electronic Switching Device with Reduction of Leakage Currents and Corresponding Control Method 审中-公开

    公开(公告)号：US20170222639A1

    公开(公告)日：2017-08-03

    申请号：US15490356

    申请日：2017-04-18

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Bruno Gailhard ,  Michel Cuenca

    IPC: H03K17/16 ,  H03K3/012

    CPC classification number: H03K17/161 ,  G11C27/024 ,  H03K3/012 ,  H03K17/6872

    Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.

    DIGITAL-TO-ANALOG CONVERTER AND CORRESPONDING DIGITAL-TO-ANALOG CONVERSION METHOD
    3.
    发明公开
    DIGITAL-TO-ANALOG CONVERTER AND CORRESPONDING DIGITAL-TO-ANALOG CONVERSION METHOD 审中-公开

    公开(公告)号：US20240097701A1

    公开(公告)日：2024-03-21

    申请号：US18463844

    申请日：2023-09-08

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Michel Cuenca ,  Didier Davino

    IPC: H03M1/70

    CPC classification number: H03M1/70

    Abstract: One embodiment provides a digital-to-analog converter that includes an output amplifier configured to be powered with a controllable power supply voltage and a ground reference voltage. The output amplifier is configured to generate an analog output signal having a dynamic range centered on a common-mode voltage. The output amplifier includes a common-mode adaptation circuit configured to position a level of the common-mode voltage at a level located in a middle portion of an interval of voltages located between the power supply voltage and the ground reference voltage, according to an effective level of the power supply voltage.

    OSCILLATOR
    5.
    发明申请
    OSCILLATOR 有权

    公开(公告)号：US20220166415A1

    公开(公告)日：2022-05-26

    申请号：US17524306

    申请日：2021-11-11

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Vincent Binet ,  Michel Cuenca ,  Ludovic Girardeau

    IPC: H03K4/50 ,  H03K3/037 ,  H03K5/24

    Abstract: Series of first ramps and second ramps are generated. A circuit delivers a first signal representative of the comparison of each first ramp with a set point and delivers a second signal representative of the comparison of each second ramp with the set point. Based on the first and second signals: a first ramp is stopped and a second ramp is started when the first ramp reaches the set point, and a second ramp is stopped and a first ramp is started when the second ramp reaches the set point. The value of the set point is modulated in response a maximum value of the first/second last ramp compared with the set point.

    Electronic Switching Device with Reduction of Leakage Currents and Corresponding Control Method
    9.
    发明申请
    Electronic Switching Device with Reduction of Leakage Currents and Corresponding Control Method 有权
    减少漏电流的电子开关装置及相应的控制方法

    公开(公告)号：US20150145564A1

    公开(公告)日：2015-05-28

    申请号：US14536122

    申请日：2014-11-07

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Bruno Gailhard ,  Michel Cuenca

    IPC: H03K17/16 ,  H03K17/687 ,  H03K3/012

    CPC classification number: H03K17/161 ,  G11C27/024 ,  H03K3/012 ,  H03K17/6872

    Abstract: A method is used to control an electronic device that includes a switching unit having a main MOS transistor having a substrate, a first conducting electrode and a second conducting electrode coupled to an output terminal. The method includes controlling the main transistor in such a way as to put it into an on state or an off state such that, when the main transistor is in the on state, the substrate and the first conducting electrode of the main transistor are connected to an input terminal and, when the main transistor is in the off state, the first conducting electrode of the main transistor is isolated from the input terminal and a first bias voltage is applied to the first conducting electrode and a second bias voltage is applied to the substrate of the main transistor.

    Abstract translation: 一种方法用于控制包括具有主MOS晶体管的开关单元的电子器件，所述主MOS晶体管具有衬底，第一导电电极和耦合到输出端子的第二导电电极。 该方法包括以这样的方式控制主晶体管，使其处于导通状态或截止状态，使得当主晶体管处于导通状态时，主晶体管的基板和第一导电电极连接到 输入端子，并且当主晶体管处于截止状态时，主晶体管的第一导电电极与输入端隔离，并且第一偏置电压被施加到第一导电电极，并且第二偏置电压施加到 主晶体管的衬底。

    Operational amplifier with elimination of offset voltage
    10.
    发明授权
    Operational amplifier with elimination of offset voltage 有权
    消除失调电压的运算放大器

    公开(公告)号：US08854135B2

    公开(公告)日：2014-10-07

    申请号：US13752538

    申请日：2013-01-29

    Applicant: STMicroelectronics (Rousset) SAS

    Inventor： Michel Cuenca ,  Laurent Truphemus

    IPC: H03F3/45 ,  H03F1/08

    CPC classification number: H03F3/45076 ,  H03F1/086 ,  H03F3/45192 ,  H03F3/45771 ,  H03F2200/36 ,  H03F2200/447 ,  H03F2203/45322 ,  H03F2203/45391 ,  H03F2203/45392 ,  H03F2203/45471

    Abstract: An operational amplifier may include a differential stage comprising two transistors whose gates are respectively linked to the two inputs of the operational amplifier. The sources of the two transistors may be linked to a first current source whose delivered current depends negatively on temperature variations and to a second current source whose delivered current is proportional to absolute temperature. The sum of these two currents may be less dependent on temperature, in that this link of the sources of the two transistors with the two current sources is effected respectively by way of two resistors, and in that the current which passes through the two transistors is imposed of proportional with temperature type, so as to allow substantially temperature-independent elimination of the offset voltage of the operational amplifier while obtaining a temperature-independent constant gain-bandwidth product.

    Abstract translation: 运算放大器可以包括差分级，其包括两个晶体管，其栅极分别连接到运算放大器的两个输入端。 两个晶体管的源极可以连接到其传递的电流取决于温度变化的第一电流源以及传递的电流与绝对温度成比例的第二电流源。 这两个电流的总和可能不太依赖于温度，因为两个晶体管与两个电流源的源极的这个连接分别通过两个电阻器实现，并且通过两个晶体管的电流是 施加与温度类型成比例的，以便在获得与温度无关的恒定增益带宽积的同时，允许基本上温度独立地消除运算放大器的偏移电压。

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