公开(公告)号：US11765905B2

公开(公告)日：2023-09-19

申请号：US17185168

申请日：2021-02-25

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hyungeun Choi ,  Jong-ho Moon ,  Han-sik Yoo ,  Kiseok Lee ,  Sung-hwan Jang ,  Seungjae Jung ,  Euichul Jeong ,  Taehyun An ,  Sangyeon Han ,  Yoosang Hwang

IPC: H10B43/40 ,  H01L23/522 ,  H01L23/528 ,  H10B41/10 ,  H10B41/20 ,  H10B41/40 ,  H10B43/10 ,  H10B43/20

CPC classification number: H10B43/40 ,  H01L23/5226 ,  H01L23/5283 ,  H10B41/10 ,  H10B41/20 ,  H10B41/40 ,  H10B43/10 ,  H10B43/20

Abstract: A semiconductor memory device may include a peripheral circuit structure including peripheral circuits integrated on a semiconductor substrate in a first region and a first keypad disposed in a second region; a stack provided on the first region of the peripheral circuit structure, the stack including a plurality of first conductive lines extending in a first direction and are vertically stacked; an upper insulating layer covering the stack; an interconnection layer provided on the upper insulating layer; a penetration plug spaced apart from the stack and is provided to penetrate the upper insulating layer to connect the interconnection layer to the peripheral circuits of the peripheral circuit structure; a molding structure provided on the second region of the peripheral circuit structure and spaced apart from the stack in the first direction; and a penetration structure provided to penetrate the molding structure and vertically overlap with the first keypad.