公开(公告)号：US20230378263A1

公开(公告)日：2023-11-23

申请号：US18085886

申请日：2022-12-21

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jin Kyu JANG ,  Byoung Hoon LEE ,  Chan Hyeong LEE ,  Nam Gyu CHO

IPC: H01L29/06 ,  H01L29/423 ,  H01L29/66 ,  H01L29/786 ,  H01L29/775

CPC classification number: H01L29/0673 ,  H01L29/4236 ,  H01L29/6656 ,  H01L29/78696 ,  H01L29/775

Abstract: A semiconductor device includes an active pattern; gate spacers on the active pattern defining a gate trench; a gate insulating layer along a sidewall and a bottom surface of the gate trench; a first conductive layer on the gate insulating layer; a second conductive layer on the first conductive layer in the gate trench; a third conductive layer on the second conductive layer in the gate trench and including a first portion between parts of the second conductive layer, and a second portion on the first portion and in contact with an upper surface of the second conductive layer; and a capping pattern on the second and third conductive layers and including a portion between the gate insulating layer and the second portion, and in contact with a sidewall of the second portion, wherein a width of the second portion is greater than a width of the first portion.

公开(公告)号：US20250107136A1

公开(公告)日：2025-03-27

申请号：US18628220

申请日：2024-04-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hyeok-Jun SON ,  Chan Hyeong LEE

IPC: H01L29/78 ,  H01L29/423 ,  H01L29/66

Abstract: Provided a semiconductor device. The semiconductor device comprises an active pattern extending in a first direction on a substrate, a gate stack extending in a second direction intersecting the first direction on the active pattern, and a source/drain pattern on at least one side of the gate stack, wherein the gate stack includes a first work function pattern, a second work function pattern on the first work function pattern, and a diffusion prevention pattern between the first work function pattern and the second work function pattern, and wherein a concentration of aluminum in the second work function pattern is greater than a concentration of aluminum in the first work function pattern.

公开(公告)号：US20180261677A1

公开(公告)日：2018-09-13

申请号：US15653588

申请日：2017-07-19

Applicant: Samsung Electronics Co., Ltd.

Inventor： Byoung Hoon LEE ,  Hyeon Jin KIM ,  Hoon Joo NA ,  Sung In SUH ,  Chan Hyeong LEE ,  Hu Yong LEE ,  Seong Hoon JEONG ,  Sang Jin HYUN

IPC: H01L29/49 ,  H01L29/78 ,  H01L27/092 ,  H01L21/28

Abstract: A semiconductor device includes a gate insulating layer disposed on a substrate, a first work function tuning layer disposed on the gate insulating layer, a lower barrier conductive layer on and in contact with the first work function tuning layer, and an upper barrier conductive layer on and in contact with the lower barrier conductive layer. The upper barrier conductive layer and the lower barrier conductive layer include a material in common, e.g., they may each include a titanium nitride (TiN) layer.

公开(公告)号：US20220254884A1

公开(公告)日：2022-08-11

申请号：US17503764

申请日：2021-10-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae-Jung KIM ,  Sang Yong KIM ,  Byoung Hoon LEE ,  Chan Hyeong LEE

IPC: H01L29/06 ,  H01L29/423

Abstract: A semiconductor device includes an active pattern disposed on a substrate. A gate insulating film is disposed on the active pattern and extends along the active pattern. A work function adjustment pattern is disposed on the gate insulating film and extends along the gate insulating film. A gate electrode is disposed on the work function adjustment pattern. The work function adjustment pattern includes a first work function adjustment film, a second work function adjustment film that includes aluminum and wraps the first work function adjustment film, and a barrier film including titanium silicon nitride (TiSiN). A silicon concentration of the barrier film is in a range of about 30 at % or less.