公开(公告)号：US20140368482A1

公开(公告)日：2014-12-18

申请号：US14470511

申请日：2014-08-27

Applicant: SAMSUNG DISPLAY CO.,LTD.

Inventor： Ok-Kwon SHIN ,  Jong Min LEE ,  Sun Kyu SON ,  Young-IL BAN ,  Jae-Han LEE

IPC: G09G3/36

CPC classification number: G09G3/3674 ,  G09G3/3677 ,  G09G2310/0205 ,  G09G2310/0286 ,  G09G2310/08 ,  G11C19/28 ,  G11C19/287

Abstract: A gate driver includes a gate integrated circuit (“IC”) chip which receives at least two scanning start signals and at least four clock control signals, and outputs a plurality of gate-on voltages, where at least two clock control signals of the at least four clock control signals are generated based on one scanning start signal of the at least two scanning start signals, timings of the at least two scanning start signals are independent of each other, and timings of the at least two clock control signals based on the one scanning start signal are independent of each other.

Abstract translation: 栅极驱动器包括：门集成电路（IC）芯片，其接收至少两个扫描开始信号和至少四个时钟控制信号，并且输出多个栅极导通电压，其中至少两个时钟控制信号 基于所述至少两个扫描开始信号的一个扫描开始信号生成至少四个时钟控制信号，所述至少两个扫描开始信号的定时彼此独立，并且所述至少两个时钟控制信号的定时基于 一个扫描开始信号彼此独立。

公开(公告)号：US20160035271A1

公开(公告)日：2016-02-04

申请号：US14880890

申请日：2015-10-12

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： Jun-Pyo LEE ,  Sun-Kyu SON ,  Ok-Kwon SHIN ,  Jung-Won KIM ,  Hee-Jin CHOI ,  Sang-Soo KIM

IPC: G09G3/20

CPC classification number: G09G3/2096 ,  G02F1/13624 ,  G02F1/136286 ,  G02F2001/134345 ,  G02F2001/134354 ,  G09G3/3659 ,  G09G2300/0426 ,  G09G2300/0852 ,  G09G2310/0205 ,  G09G2320/0257

Abstract: A display device includes a first unit pixel disposed in a first pixel column and a first pixel row, and a second unit pixel disposed in the first pixel column and a second pixel row adjacent to the first pixel row, and first and second gate lines extending in a row direction and having gate voltage input pads at a terminal portion thereof. First and second data lines extend in a column direction and are connected to the first unit pixel and the second unit pixel, respectively. A first charge control line extends in the row direction and has a charge control gate voltage input pad disposed at a terminal portion thereof. The first gate line is connected to the first unit pixel and the second gate line is connected to the second unit pixel. The first gate line and the second gate line simultaneously receive a same gate pulse.

Abstract translation: 显示装置包括设置在第一像素列和第一像素行中的第一单位像素和布置在第一像素列中的第二单位像素和与第一像素行相邻的第二像素行，第一和第二栅极线延伸 并且在其端子部分具有栅极电压输入焊盘。 第一和第二数据线在列方向上延伸并且分别连接到第一单位像素和第二单位像素。 第一充电控制线在行方向上延伸并且具有设置在其端子部分处的充电控制栅极电压输入焊盘。 第一栅极线连接到第一单位像素，第二栅极线连接到第二单位像素。 第一栅极线和第二栅极线同时接收相同的栅极脉冲。