公开(公告)号：US20240038672A1

公开(公告)日：2024-02-01

申请号：US17877156

申请日：2022-07-29

Applicant: QUALCOMM Incorporated

Inventor： Mahalingam NAGARAJAN ,  Vaishnav SRINIVAS ,  Nitin JUNEJA ,  Christophe AVOINNE ,  Xavier Loic LELOUP ,  Michael David JAGER ,  Charles David PAYNTER ,  Joon Young PARK

IPC: H01L23/538 ,  H01L25/065 ,  H01L23/00

CPC classification number: H01L23/5386 ,  H01L25/0655 ,  H01L24/14 ,  H01L24/16 ,  H01L2224/16227 ,  H01L2224/14132 ,  H01L24/81 ,  H01L2224/81815

Abstract: A package comprising a substrate comprising at least one dielectric layer and a plurality of interconnects; a first integrated device coupled to the substrate through a first plurality of solder interconnects, wherein the first plurality of solder interconnects includes a first plurality of inner solder interconnects and a first plurality of perimeter solder interconnects; and a second integrated device coupled to the substrate through a second plurality of solder interconnects. The first integrated device is configured to be electrically coupled to the second integrated device through an electrical path. The electrical path comprises an inner solder interconnect from the first plurality of inner solder interconnects, at least one interconnect from the plurality of interconnects, and a solder interconnect from the second plurality of solder interconnects.