Abstract:
A bias structure includes a reference voltage node connected to gate structures of a first NMOS transistor and a second NMOS transistor, a bias voltage node comprising a bias voltage, and a first op amp having a first input connected to the reference voltage, a second input connected to a drain of the first NMOS transistor, and an output connected to gate structures of a first PMOS transistor and a second PMOS transistor. The bias structure further includes a second op amp having a first input connected to the reference voltage, a second input connected to a drain of the second NMOS transistor, and an output connected to a gate structure of a third NMOS transistor and the bias voltage node. The first NMOS transistor matches a transistor of a differential pair of an integrated circuit device.
Abstract:
An apparatus is provided. The apparatus includes a calibration circuit configured to generate a reference signal and at least one differential circuit each being configured to operate at a calibrated transconductance over process or condition variations based on the reference signal. The calibration circuit may be configured to generate the reference signal independent of the at least one differential circuit. A method for operating at least one differential circuit is provided. The method includes generating a reference signal and operating the at least one differential circuit at a calibrated transconductance or gain over process or condition variations based on the reference signal. The reference signal may be generated independently of the at least one differential circuit.
Abstract:
Aspects of the disclosure are directed to a low noise T-coil design. In accordance with one aspect, an input/output (I/O) circuit includes a first T-coil, wherein the first T-coil includes a first set of two inductors connected to each other in series arranged to accommodate a first current flow to produce a first magnetic field with a first perpendicular direction; and a second T-coil, wherein the second T-coil includes a second set of two inductors connected to each other in series arranged to accommodate a second current flow to produce a second magnetic field with a second perpendicular direction; and wherein the second magnetic field cancels the first magnetic field.
Abstract:
An amplifier has a first amplifying circuit configured to receive a voltage input and to output an amplified current, a second amplifying circuit configured to receive the amplified current and to output an amplified voltage, the second amplifying circuit comprising a pair of feedback resistive elements, each feedback resistive element being coupled to a gate and drain of a corresponding transistor in a pair of output transistors in the second amplifying circuit, and a feedback circuit configured to provide a negative feedback loop between an input and an output of the pair of output transistors, the feedback circuit including a first transconductance amplification circuit and a first equalizing circuit.