公开(公告)号：US20150161057A1

公开(公告)日：2015-06-11

申请号：US14147555

申请日：2014-01-05

Applicant: Qualcomm Incorporated

Inventor： THOMAS M. ZENG ,  AZZEDINE TOUZNI ,  STEPHEN A. MOLLOY ,  SATYAKI MUKHERJEE ,  ABHIRAMI SENTHILKUMARAN ,  OLAV HAUGAN ,  TZUNG REN TZENG ,  TAREK ZGHAL ,  JEAN-LOUIS O. TARDIEUX ,  AJAY UPADHYAYA ,  ZHURANG ZHAO ,  PAWAN CHHABRA ,  SUBRAHMANYAM MOOLA ,  PAVAN KUMAR ,  JAYDEEP R. CHOKSHI ,  VICTOR K. WONG ,  VIPUL C. GANDHI

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F11/2221 ,  G11C29/18

Abstract: Systems and methods are disclosed for providing memory address translation for a memory management system. One embodiment of such a system comprises a memory device and an application processor in communication via a system interconnect. The application processor comprises test code for testing one or more of a plurality of hardware devices. Each of the hardware devices has a corresponding system memory management unit (SMMU) for processing memory requests associated with the hardware device to the memory device. The system further comprises a client-side address translation system in communication with the system interconnect and the plurality of SMMUs. The client-side address translation system is configured to selectively route stimulus traffic associated with the test code to a client port on one or more of the plurality of SMMUs for testing the corresponding hardware devices.

Abstract translation: 公开了用于为存储器管理系统提供存储器地址转换的系统和方法。 这种系统的一个实施例包括存储器设备和经由系统互连进行通信的应用处理器。 应用处理器包括用于测试多个硬件设备中的一个或多个的测试代码。 每个硬件设备具有相应的系统存储器管理单元（SMMU），用于处理与硬件设备相关联的存储器请求到存储器设备。 该系统还包括与系统互连和多个SMMU通信的客户端地址转换系统。 客户端地址转换系统被配置为选择性地将与测试代码相关联的刺激流量路由到多个SMMU中的一个或多个SMMU上的客户端口，以测试对应的硬件设备。

公开(公告)号：US20160077916A1

公开(公告)日：2016-03-17

申请号：US14484125

申请日：2014-09-11

Applicant: QUALCOMM INCORPORATED

Inventor： JEFFREY DAVID SHABEL ,  PHILIP MUELLER, JR. ,  ZHURANG ZHAO ,  CARL VICTOR STREETER ,  RASHMI KULKARNI

IPC: G06F11/14 ,  G06F11/30

CPC classification number: G06F11/141 ,  G06F1/3206 ,  G06F1/3215 ,  G06F1/3287 ,  G06F1/3293 ,  G06F11/1428 ,  G06F11/3062 ,  Y02D10/122 ,  Y02D10/171

Abstract: Systems and methods for external access detection and recovery in a subsystem of a system-on-a-chip (SoC) in a portable computing device (PCD) are presented. In operation, a subsystem of the SoC is operated in an internal mode independently of the SoC while the SoC is in a low power state, such as a non-functional or zero power state or mode. The subsystem comprises a processor in communication with a memory, a sensor, and a monitor module. The monitor module detects when the processor of the subsystem requests access to a component external to the subsystem. In response to this detected request, the SoC is caused to enter into a full power state or mode, and the subsystem is caused to exit the internal mode of operation.

Abstract translation: 提出了便携式计算设备（PCD）中的片上系统（SoC）的子系统中外部访问检测和恢复的系统和方法。 在操作中，SoC的子系统在独立于SoC的内部模式下操作，而SoC处于低功率状态，例如非功能或零功率状态或模式。 子系统包括与存储器，传感器和监视器模块通信的处理器。 监视器模块检测子系统的处理器何时请求访问子系统外部的组件。 响应于该检测到的请求，使SoC进入全功率状态或模式，使子系统退出内部操作模式。