公开(公告)号：US20150161057A1

公开(公告)日：2015-06-11

申请号：US14147555

申请日：2014-01-05

Applicant: Qualcomm Incorporated

Inventor： THOMAS M. ZENG ,  AZZEDINE TOUZNI ,  STEPHEN A. MOLLOY ,  SATYAKI MUKHERJEE ,  ABHIRAMI SENTHILKUMARAN ,  OLAV HAUGAN ,  TZUNG REN TZENG ,  TAREK ZGHAL ,  JEAN-LOUIS O. TARDIEUX ,  AJAY UPADHYAYA ,  ZHURANG ZHAO ,  PAWAN CHHABRA ,  SUBRAHMANYAM MOOLA ,  PAVAN KUMAR ,  JAYDEEP R. CHOKSHI ,  VICTOR K. WONG ,  VIPUL C. GANDHI

IPC: G06F12/10

CPC classification number: G06F12/1027 ,  G06F11/2221 ,  G11C29/18

Abstract: Systems and methods are disclosed for providing memory address translation for a memory management system. One embodiment of such a system comprises a memory device and an application processor in communication via a system interconnect. The application processor comprises test code for testing one or more of a plurality of hardware devices. Each of the hardware devices has a corresponding system memory management unit (SMMU) for processing memory requests associated with the hardware device to the memory device. The system further comprises a client-side address translation system in communication with the system interconnect and the plurality of SMMUs. The client-side address translation system is configured to selectively route stimulus traffic associated with the test code to a client port on one or more of the plurality of SMMUs for testing the corresponding hardware devices.

Abstract translation: 公开了用于为存储器管理系统提供存储器地址转换的系统和方法。 这种系统的一个实施例包括存储器设备和经由系统互连进行通信的应用处理器。 应用处理器包括用于测试多个硬件设备中的一个或多个的测试代码。 每个硬件设备具有相应的系统存储器管理单元（SMMU），用于处理与硬件设备相关联的存储器请求到存储器设备。 该系统还包括与系统互连和多个SMMU通信的客户端地址转换系统。 客户端地址转换系统被配置为选择性地将与测试代码相关联的刺激流量路由到多个SMMU中的一个或多个SMMU上的客户端口，以测试对应的硬件设备。

公开(公告)号：US20150199279A1

公开(公告)日：2015-07-16

申请号：US14155298

申请日：2014-01-14

Applicant: QUALCOMM INCORPORATED

Inventor： OLAV HAUGAN

IPC: G06F12/10 ,  G06F12/12

CPC classification number: G06F12/1009 ,  G06F11/073 ,  G06F11/0778 ,  G06F12/1027 ,  G06F12/12 ,  G06F12/1425 ,  G06F2212/1008 ,  G06F2212/684

Abstract: A method and system for tracking transactions associated with a system memory management unit (“SMMU”) includes receiving a plurality of memory requests from a plurality of processing elements and storing contents of each memory request in a transaction history buffer (“THB”). The contents of a memory request stored in the THB may comprise at least one of a security bit; a Virtual Machine Identifier (“VMID”); a Stream identifier (“SID”); a SMMU Context Bank that was used; and whether or not the virtual address was present in the translation look-aside buffer. A status for a lock command for the THB may be stored in the transaction history buffer. Action taken by the SMMU in response to a memory request may also be stored in the THB. With this data stored in the THB, root causes for errors within the portable computing device may be determined.

Abstract translation: 用于跟踪与系统存储器管理单元（“SMMU”）相关联的交易的方法和系统包括从多个处理元件接收多个存储器请求并将每个存储器请求的内容存储在事务历史缓冲器（“THB”）中。 存储在THB中的存储器请求的内容可以包括安全位中的至少一个; 虚拟机标识符（“VMID”）; 流标识符（“SID”）; 使用SMMU上下文银行; 以及虚拟地址是否存在于翻译后备缓冲器中。 用于THB的锁定命令的状态可以存储在事务历史缓冲器中。 SMMU响应内存请求所采取的行动也可以存储在THB中。 通过存储在THB中的数据，可以确定便携式计算设备内的错误的根本原因。