Abstract:
An integrated circuit includes a trace subsystem that provides timestamps for events occurring in a trace source that does not natively support time stamping trace data. A timestamp inserter is coupled to such a trace source. The timestamp inserter generates a modified trace data stream by arranging a reference or references with the trace information from the trace source on a trace bus. A trace destination receives the modified trace data stream including the reference(s). In some embodiments, a timestamp inserter receives a timestamp request and stores a reference in a buffer. Upon later receipt of trace information associated with the request, the timestamp inserter inserts the reference, a current reference and the received trace information into the trace data stream.
Abstract:
Systems and methods for external access detection and recovery in a subsystem of a system-on-a-chip (SoC) in a portable computing device (PCD) are presented. In operation, a subsystem of the SoC is operated independently of the rest of the SoC, such as when the SoC is in a non-functional or low power mode or state. The subsystem comprises a hardware agent in communication with a trace buffer. While the subsystem is operating independently of the rest of the SoC, the trace buffer captures trace data about the operation of the subsystem. During the operation of the subsystem, in response to identifying a trigger event, the trace buffer stops capturing the trace data, and a wake-up notification comprising a signal from the hardware agent to the SoC is communicated.
Abstract:
Systems and methods are disclosed for distributing and replaying trigger packets via a variable latency bus interconnect in a trace system. An embodiment of such a method comprises generating a plurality of trigger packets from a plurality of trigger sources on a system on chip. Each trigger packet defines a corresponding event and a corresponding system-generated timestamp. The plurality of trigger packets are distributed from the corresponding trigger sources to a centralized logic analyzer via a variable latency bus interconnect. The received triggered packets are re-ordered according to the corresponding system-generated timestamps into an order in which the corresponding events occurred. The received trigger packets are replayed in the order in which the corresponding events occurred.
Abstract:
Systems, methods, and computer programs for managing trace data in a portable computing device are disclosed. One system includes a system-on-chip and a trace parser. The system-on-chip may have a plurality of trace sources for originating corresponding trace data and a trace system configured to receive and dump the trace data from one of the trace sources to a plurality of trace sinks. The trace parser is configured to reconstruct the trace data dumped to the plurality of trace sinks.