公开(公告)号：US20140252544A1

公开(公告)日：2014-09-11

申请号：US13785502

申请日：2013-03-05

Applicant: QUALCOMM INCORPORATED

Inventor： Yue Li ,  Xiaoming Chen ,  Zhongping Bao ,  Charles D. Paynter ,  Xiaonan Zhang ,  Ryan D. Lane

IPC: H01L49/02

CPC classification number: H01G2/06 ,  H01G4/38 ,  H01G4/40 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L24/17 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Some implementations provide a semiconductor device that includes a first substrate, a die coupled to the first substrate, and a set of solder balls coupled to the first substrate. The set of solder balls is configured to provide an electrical connection between the die and a second substrate. The semiconductor device also includes at least one decoupling capacitor coupled to the die through the first substrate. The at least one decoupling capacitor is configured to provide an electrical connection between the die and the second substrate. The at least one decoupling capacitor is coupled to the first substrate such that the at least one decoupling capacitor is positioned between the first substrate and the second substrate. In some implementations, the second substrate is a printed circuit board (PCB). In some implementations, the first substrate is a first package substrate, and the second substrate is a second package substrate.

Abstract translation: 一些实施方式提供一种半导体器件，其包括第一衬底，耦合到第一衬底的管芯和耦合到第一衬底的一组焊球。 该组焊球被配置成在管芯和第二衬底之间提供电连接。 半导体器件还包括通过第一衬底耦合到管芯的至少一个去耦电容器。 所述至少一个去耦电容器被配置为在所述管芯和所述第二衬底之间提供电连接。 所述至少一个去耦电容器耦合到所述第一衬底，使得所述至少一个去耦电容器位于所述第一衬底和所述第二衬底之间。 在一些实施方案中，第二衬底是印刷电路板（PCB）。 在一些实施方案中，第一衬底是第一封装衬底，第二衬底是第二封装衬底。

公开(公告)号：US09263186B2

公开(公告)日：2016-02-16

申请号：US13785502

申请日：2013-03-05

Applicant: QUALCOMM Incorporated

Inventor： Yue Li ,  Xiaoming Chen ,  Zhongping Bao ,  Charles D. Paynter ,  Xiaonan Zhang ,  Ryan D. Lane

IPC: H01L49/02 ,  H01G2/06 ,  H01L23/50 ,  H01L23/64 ,  H01L23/00 ,  H01G4/38 ,  H01G4/40 ,  H01L23/498

CPC classification number: H01G2/06 ,  H01G4/38 ,  H01G4/40 ,  H01L23/49822 ,  H01L23/49827 ,  H01L23/50 ,  H01L23/642 ,  H01L24/17 ,  H01L24/73 ,  H01L25/0657 ,  H01L25/105 ,  H01L2224/16145 ,  H01L2224/16225 ,  H01L2224/16227 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2225/06506 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06517 ,  H01L2225/06562 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15311 ,  H01L2924/15331 ,  H01L2924/19041 ,  H01L2924/19104 ,  H01L2924/19105 ,  H01L2924/00012 ,  H01L2924/00

Abstract: Some implementations provide a semiconductor device that includes a first substrate, a die coupled to the first substrate, and a set of solder balls coupled to the first substrate. The set of solder balls is configured to provide an electrical connection between the die and a second substrate. The semiconductor device also includes at least one decoupling capacitor coupled to the die through the first substrate. The at least one decoupling capacitor is configured to provide an electrical connection between the die and the second substrate. The at least one decoupling capacitor is coupled to the first substrate such that the at least one decoupling capacitor is positioned between the first substrate and the second substrate. In some implementations, the second substrate is a printed circuit board (PCB). In some implementations, the first substrate is a first package substrate, and the second substrate is a second package substrate.

Abstract translation: 一些实施方式提供一种半导体器件，其包括第一衬底，耦合到第一衬底的管芯和耦合到第一衬底的一组焊球。 该组焊球被配置成在管芯和第二衬底之间提供电连接。 半导体器件还包括通过第一衬底耦合到管芯的至少一个去耦电容器。 所述至少一个去耦电容器被配置为在所述管芯和所述第二衬底之间提供电连接。 所述至少一个去耦电容器耦合到所述第一衬底，使得所述至少一个去耦电容器位于所述第一衬底和所述第二衬底之间。 在一些实施方案中，第二衬底是印刷电路板（PCB）。 在一些实施方案中，第一衬底是第一封装衬底，第二衬底是第二封装衬底。

公开(公告)号：US09041176B2

公开(公告)日：2015-05-26

申请号：US13764356

申请日：2013-02-11

Applicant: Qualcomm Incorporated

Inventor： Yue Li ,  Charles D. Paynter ,  Ruey Kae Zang

IPC: H01L23/02 ,  H01L21/00 ,  H01L21/82 ,  H01L49/02 ,  H01L25/065

CPC classification number: H01L21/82 ,  H01L25/065 ,  H01L25/0657 ,  H01L28/00 ,  H01L2224/16225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/19105 ,  Y10T29/53174

Abstract: Some implementations provide a structure that includes a first package substrate, a first component, a second package substrate, a second component, and a third component. The first package substrate has a first area. The first component has a first height and is positioned on the first area. The second package substrate is coupled to the first package substrate. The second package substrate has second and third areas. The second area of the second package substrate vertically overlaps with the first area of the first package substrate The third area of the second package substrate is non-overlapping with the first area of the first package substrate. The second component has a second height and is positioned on the second area. The third component is positioned on the third area. The third component has a third height that is greater than each of the first and second heights.

Abstract translation: 一些实施方案提供了包括第一封装衬底，第一部件，第二封装衬底，第二部件和第三部件的结构。 第一封装衬底具有第一区域。 第一部件具有第一高度并且位于第一区域上。 第二封装衬底耦合到第一封装衬底。 第二封装衬底具有第二和第三区域。 第二封装衬底的第二区域垂直地与第一封装衬底的第一区域重叠。第二封装衬底的第三区域与第一封装衬底的第一区域不重叠。 第二部件具有第二高度并且位于第二区域上。 第三个组件位于第三个区域。 第三部件具有大于第一和第二高度中的每一个的第三高度。

公开(公告)号：US20140097512A1

公开(公告)日：2014-04-10

申请号：US13764356

申请日：2013-02-11

Applicant: QUALCOMM INCORPORATED

Inventor： Yue Li ,  Charles D. Paynter ,  Ruey Kae Zang

IPC: H01L21/82

CPC classification number: H01L21/82 ,  H01L25/065 ,  H01L25/0657 ,  H01L28/00 ,  H01L2224/16225 ,  H01L2225/1023 ,  H01L2225/1058 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/19105 ,  Y10T29/53174

Abstract: Some implementations provide a structure that includes a first package substrate, a first component, a second package substrate, a second component, and a third component. The first package substrate has a first area. The first component has a first height and is positioned on the first area. The second package substrate is coupled to the first package substrate. The second package substrate has second and third areas. The second area of the second package substrate vertically overlaps with the first area of the first package substrate The third area of the second package substrate is non-overlapping with the first area of the first package substrate. The second component has a second height and is positioned on the second area. The third component is positioned on the third area. The third component has a third height that is greater than each of the first and second heights.

Abstract translation: 一些实施方案提供了包括第一封装衬底，第一部件，第二封装衬底，第二部件和第三部件的结构。 第一封装衬底具有第一区域。 第一部件具有第一高度并且位于第一区域上。 第二封装衬底耦合到第一封装衬底。 第二封装衬底具有第二和第三区域。 第二封装衬底的第二区域垂直地与第一封装衬底的第一区域重叠。第二封装衬底的第三区域与第一封装衬底的第一区域不重叠。 第二部件具有第二高度并且位于第二区域上。 第三个组件位于第三个区域。 第三部件具有大于第一和第二高度中的每一个的第三高度。