公开(公告)号：US20250165670A1

公开(公告)日：2025-05-22

申请号：US18950423

申请日：2024-11-18

Applicant: MEDIATEK INC.

Inventor： Chee-Kong Ung ,  Jung-Wen Ho ,  Sheng-Ming Chang ,  Ching-Chih Li

IPC: G06F30/20

Abstract: The application provides an automatic check method and device. A schematic diagram or a layout having a plurality of elements is received. Whether the elements are classified into respective subcategories in a naming rule is determined based on keywords in the naming rule and names of the elements, wherein the naming rule comprises a plurality of main categories, each of the main categories having a plurality of subcategories, and each of the subcategories within each of the main categories having a keyword and corresponding to a predefined design rule. Incorrectly named elements that are not classified into respective subcategories are reported on a display. Fixed names of the incorrectly named elements are received.

公开(公告)号：US10581414B2

公开(公告)日：2020-03-03

申请号：US15274473

申请日：2016-09-23

Applicant: MediaTek Inc.

Inventor： Chun-Neng Liao ,  Meng-Hsin Chiang ,  Chun-Wei Chang ,  Chee-Kong Ung ,  Ching-Chih Li

IPC: H03K5/1252 ,  H03H7/06 ,  H01L25/16 ,  H01L23/64 ,  H03H3/02

Abstract: A semiconductor integrated circuit device includes a chip main circuit, a damper and a passive component. The chip main circuit is coupled to a power source and performs a predetermined function. The damper is coupled to an output terminal of the chip main circuit. The passive component is coupled to the chip main circuit via the damper.

公开(公告)号：US20170300077A1

公开(公告)日：2017-10-19

申请号：US15641233

申请日：2017-07-04

Applicant: MEDIATEK INC.

Inventor： Chia-Tao Hsu ,  Chee-Kong Ung ,  Li-Chun Yang ,  Yu-Sung Chen ,  Ming-Tse Dai

IPC: G05F3/04 ,  G01R19/00

CPC classification number: G05F3/04 ,  G01R19/0084

Abstract: A power management circuit includes a voltage sensing circuit and a supply voltage adjusting circuit. The voltage sensing circuit is arranged for sensing a plurality of voltages respectively of a plurality of nodes of a PCB to generate a sensing result. The supply voltage adjusting circuit is coupled to the voltage sensing circuit, and is arranged for determining a voltage level of a supply voltage supplied to a power plane of the PCB by referring to the sensing result.

公开(公告)号：US20160211318A1

公开(公告)日：2016-07-21

申请号：US14925995

申请日：2015-10-29

Applicant: MEDIATEK INC.

Inventor： Chao-Yang Yeh ,  Chee-Kong Ung ,  Tzu-Hung Lin ,  Jia-Wei Fang

IPC: H01L49/02 ,  H01L23/498 ,  H01L23/00 ,  H01L23/31

CPC classification number: H01L28/40 ,  H01L23/3157 ,  H01L23/49816 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L25/16 ,  H01L28/10 ,  H01L28/20 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/014

Abstract: A microelectronic package includes a packaging substrate having a chip mounting surface; a chip mounted on the chip mounting surface of the packaging substrate with the chip's active surface facing down to the chip mounting surface; a plurality of input/output (I/O) pads distributed on the active surface of the chip; and a discrete passive element mounted on the active surface of the chip. The discrete passive element may be a decoupling capacitor, a resistor, or an inductor.

Abstract translation: 微电子封装包括具有芯片安装表面的封装衬底; 芯片安装在封装基板的芯片安装表面上，芯片的有源表面朝向芯片安装表面; 分布在芯片的有源表面上的多个输入/输出（I / O）焊盘; 以及安装在芯片的有源表面上的分立无源元件。 分立无源元件可以是去耦电容器，电阻器或电感器。

公开(公告)号：US09733661B2

公开(公告)日：2017-08-15

申请号：US14499267

申请日：2014-09-29

Applicant: MEDIATEK INC.

Inventor： Chia-Tao Hsu ,  Chee-Kong Ung ,  Li-Chun Yang ,  Yu-Sung Chen ,  Ming-Tse Dai

IPC: G05F3/04 ,  G01R19/00

CPC classification number: G05F3/04 ,  G01R19/0084

Abstract: A power management circuit includes a voltage sensing circuit and a supply voltage adjusting circuit. The voltage sensing circuit is arranged for sensing a plurality of voltages respectively of a plurality of nodes of a PCB to generate a sensing result. The supply voltage adjusting circuit is coupled to the voltage sensing circuit, and is arranged for determining a voltage level of a supply voltage supplied to a power plane of the PCB by referring to the sensing result.

公开(公告)号：US09660017B2

公开(公告)日：2017-05-23

申请号：US14925995

申请日：2015-10-29

Applicant: MEDIATEK INC.

Inventor： Chao-Yang Yeh ,  Chee-Kong Ung ,  Tzu-Hung Lin ,  Jia-Wei Fang

IPC: H01L23/34 ,  H01L49/02 ,  H01L23/31 ,  H01L23/498 ,  H01L23/00 ,  H01L25/16

CPC classification number: H01L28/40 ,  H01L23/3157 ,  H01L23/49816 ,  H01L24/09 ,  H01L24/13 ,  H01L24/16 ,  H01L24/19 ,  H01L24/32 ,  H01L24/73 ,  H01L24/92 ,  H01L25/16 ,  H01L28/10 ,  H01L28/20 ,  H01L2224/02371 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/131 ,  H01L2224/16227 ,  H01L2224/16265 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/92125 ,  H01L2924/15159 ,  H01L2924/15311 ,  H01L2924/18162 ,  H01L2924/19041 ,  H01L2924/19042 ,  H01L2924/19043 ,  H01L2924/19103 ,  H01L2924/19104 ,  H01L2924/014

Abstract: A microelectronic package includes a packaging substrate having a chip mounting surface; a chip mounted on the chip mounting surface of the packaging substrate with the chip's active surface facing down to the chip mounting surface; a plurality of input/output (I/O) pads distributed on the active surface of the chip; and a discrete passive element mounted on the active surface of the chip. The discrete passive element may be a decoupling capacitor, a resistor, or an inductor.

公开(公告)号：US20160091915A1

公开(公告)日：2016-03-31

申请号：US14499267

申请日：2014-09-29

Applicant: MEDIATEK INC.

Inventor： Chia-Tao Hsu ,  Chee-Kong Ung ,  Li-Chun Yang ,  Yu-Sung Chen ,  Ming-Tse Dai

IPC: G05F3/04 ,  H05K7/02 ,  G01R19/00

CPC classification number: G05F3/04 ,  G01R19/0084

Abstract: A power management circuit includes a voltage sensing circuit and a supply voltage adjusting circuit. The voltage sensing circuit is arranged for sensing a plurality of voltages respectively of a plurality of nodes of a PCB to generate a sensing result. The supply voltage adjusting circuit is coupled to the voltage sensing circuit, and is arranged for determining a voltage level of a supply voltage supplied to a power plane of the PCB by referring to the sensing result.

Abstract translation: 电源管理电路包括电压检测电路和电源电压调节电路。 电压感测电路被布置成用于感测PCB的多个节点的多个电压以产生感测结果。 电源电压调节电路耦合到电压感测电路，并且被配置为通过参考感测结果来确定提供给PCB的电源平面的电源电压的电压电平。