Abstract:
An encoder (300) selects (702, 1302, 1304, 1306, 1308) one or more subsets of spatially or temporally correlated transformed data coefficients, on the basis of the significance of each subset in representing the data. The encoder (300) and a complementary decoder (400) may be applied to wavelet transform encoded images (500). The encoder (300) may be implemented on a wireless to Internet gateway server (108), in order to reduce byte size of encoded images (500) sent through a wireless network (112), and reduce the amount of processing that must be performed by a wireless device (118) to decode an image or other data. The decoder (400) and/or encoder (300) may be implemented on the wireless device (118).
Abstract:
A method for generating a wavelet filter provides improved selectivity with minimal computational intensity in digital data systems (300,400). The process begins by generating an initial wavelet formed of low pass and high pass analysis filter bank (302). The next steps include obtaining an upper triangular matrix which, when multiplied by the initial wavelet, produces a product retaining the symmetry and enhancing the number of zero moment(s) of the initial wavelet (304); and obtaining a lower triangular matrix which, when multiplied by the initial wavelet, produces a product retaining the symmetry and the zero moment of the initial wavelet (306). By multiplying the upper and lower triangular matrices with the initial wavelet, an updated wavelet filter with improved selectivity is produced (308, 318).
Abstract:
An RF contact (2) provides multiple RF paths (51-53) with minimal RF path lengths between a first (8) and second (36) interconnecting surfaces. A stationary member (6) is soldered on the first surface (8). A main spring member (22) is resiliently (26) connected to the stationary member (6) on a springing end (27) to provide contact travel (38) which ensures wiping action with the second surface (36). A secondary spring member (28) having at least two wiping portions (42 and 46) is resiliently (29) connected to the displacement member on its other end (38) to engage the stationary member (6) and the main spring member (22) along the at least two wiping portions (42 and 46) when the main spring member (22) is resiliently biased against the secondary spring member (28) and the stationary member (6).
Abstract:
A fast locking phase locked loop includes a first integrator that provides a signal representing a function of the mathematical or ideal integral of the phase difference between an input signal and a feedback signal. A voltage controlled oscillator is coupled to the first integrator and provides a signal to a phase shifter that provides the phase shifted signal that represents a function of the phase of the signal from the VCO, and a function of the integral of the phase difference between the integrated signals.
Abstract:
A digital data system (100) provides 1-D, 2-D and 3-D capability and multi-band channel capability. Improved filter banks are created by generating a filter bank having an analysis portion and synthesis portion and obtaining wavelet coefficients (302) for each portion. The wavelet coefficients are expressed in a format capable of canonical signed digit (CSD) representation, such as integers (302). The canonical signed digit (CSD) representation is controlled by a value, N, selected to control resolution of the CSD coding. Optimized CSD-coded wavelet coefficients are used as filters for data signals (318).
Abstract:
A method and apparatus are provided for generating a uniquely shaped prototype digital pulse which is transmitted with minimal frequency spectrum consumption and yet a relatively high bit rate. Such uniquely shaped digital pulse is stored in a memory included in a transmitter until transmission is desired, at which time a positive of the pulse is transmitted to correspond to a first logic level or the negative of the pulse is transmitted to correspond to a second logic level.
Abstract:
A voltage controlled oscillator includes a main varactor diode coupled to a frequency resonating circuit to produce an output frequency in response to a control voltage. A secondary varactor diode of an appreciably lower voltage to frequency sensitivity ratio is coupled to the main varactor diode. A modulation input circuit is coupled to the secondary varactor diode to enable modulation of the resonating output frequency. A linearizing circuit is coupled to the secondary varactor diode and tracks the main varactor diode capacitance to continuously adjust the bias voltage of the secondary varactor diode to provide constant carrier modulation deviation.
Abstract:
A digital data system (100) provides 1-D, 2-D and 3-D capability and multi-band channel capability. Improved filter banks are created by generating a filter bank having an analysis portion and synthesis portion and obtaining wavelet coefficients (302) for each portion. The wavelet coefficients are expressed in a format capable of canonical signed digit (CSD) representation, such as integers (302). The canonical signed digit (CSD) representation is controlled by a value, N, selected to control resolution of the CSD coding. Optimized CSD-coded wavelet coefficients are used as filters for data signals (318).
Abstract:
An encoder (300) selects (702, 1302, 1304,1306,1308) one or more subsets of spatially or temporally correlated transformed data coefficients, on the basis of the significance of each subset in representing the data. The encoder (300) and a complementary decoder (400) may be applied to wavelet transform encoded images (500). The encoder (300) may be implemented on a wireless to Internet gateway server (108), in order to reduce byte size of encoded images (500) sent through a wireless network (112), and reduce the amount of processing that must be performed by a wireless device (118) to decode an image or other data. The decoder (400) and/or encoder (300) may be implemented on the wireless device (118).
Abstract:
A frequency synthesizer is provided including a reference frequency generator coupled to one input of a phase detector. The output of the phase detector is coupled via a pair of alternatingly connected filters through a voltage controlled oscillator and a divider circuit to the remaining input of the phase detector to form a phase locked loop. The first filter of the pair is designated for operation on a main channel frequency while the remaining filter is designated for operation on a priority channel frequency. The capacitive elements of each respective filter remain fully charged up for operation on their respective frequencies and thus when such filters are alternately switched between to change frequency from the main channel to the priority channel, the capacitive elements need not be charged to new levels to accommodate such frequency change. Thus, switching between a main channel and a priority channel is accomplished in a minimal amount of time with a significant reduction in frequency synthesizer energy requirements.