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公开(公告)号：US20240004412A1
公开(公告)日：2024-01-04
申请号：US17809768
申请日：2022-06-29
Applicant: Halo Microelectronics International
Inventor： Gangqiang Zhang , Zhao Fang , Wenchao Qu
Abstract: A low dropout regulator includes a first transistor having a first drain/source terminal coupled to an input terminal of a regulator, and a second drain/source terminal coupled to an output terminal of the regulator, a second transistor having a first drain/source terminal coupled to the input terminal of the regulator, and a second drain/source terminal coupled to the output terminal of the regulator through a resistor, and an error amplifier having an inverting input configured to receive a reference, a non-inverting input configured to detect an output voltage of the regulator, and an output coupled to gates of the first transistor and the second transistor.
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公开(公告)号：US20250150072A1
公开(公告)日：2025-05-08
申请号：US18386965
申请日：2023-11-03
Applicant: Halo Microelectronics International
Inventor： Muhammad Ahmed , Wenchao Qu
IPC: H03K17/082 , H03K17/284
Abstract: An apparatus includes a high side switch connected between an input voltage bus and a load terminal, the load terminal being configured to be coupled to a load, a high side gate drive circuit configured to generate a gate drive signal for the high side switch, and a resonance suppression circuit having a first terminal connected to a gate of the high side switch, and a second terminal connected to the load terminal, wherein after a predetermined delay counting from a falling edge of an enable signal applied to the high side gate drive circuit, the resonance suppression circuit is configured to be active, and after a voltage on the load terminal rises above a ground voltage potential for a first time, the resonance suppression circuit is configured to pull a voltage on the gate of the high side switch down to a low voltage.
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公开(公告)号：US11695272B1
公开(公告)日：2023-07-04
申请号：US17646666
申请日：2021-12-30
Applicant: Halo Microelectronics International
Inventor： Zhao Fang , Wenchao Qu , Gangqiang Zhang
Abstract: An apparatus includes a first diode and a second diode connected in series between a first voltage terminal and a second voltage terminal, a switch connected between the first voltage terminal and the second voltage terminal, and a clamping threshold circuit connected between a common node of the first diode and the second diode, and a gate of the switch, wherein the clamping threshold circuit is configured such that in response to a voltage surge applied to the common node of the first diode and the second diode, the switch is turned on once the voltage surge is greater than a predetermined threshold.
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Patent Agency Ranking
公开(公告)号：US12140986B2
公开(公告)日：2024-11-12
申请号：US17809768
申请日：2022-06-29
Applicant: Halo Microelectronics International
Inventor： Gangqiang Zhang , Zhao Fang , Wenchao Qu
Abstract: A low dropout regulator includes a first transistor having a first drain/source terminal coupled to an input terminal of a regulator, and a second drain/source terminal coupled to an output terminal of the regulator, a second transistor having a first drain/source terminal coupled to the input terminal of the regulator, and a second drain/source terminal coupled to the output terminal of the regulator through a resistor, and an error amplifier having an inverting input configured to receive a reference, a non-inverting input configured to detect an output voltage of the regulator, and an output coupled to gates of the first transistor and the second transistor.
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公开(公告)号：US20250023445A1
公开(公告)日：2025-01-16
申请号：US18221877
申请日：2023-07-13
Applicant: Halo Microelectronics International
Inventor： Zhao Fang , Yang Xu , Wenchao Qu
Abstract: An apparatus includes a first switch and a second switch connected in series between an input voltage bus and ground, a bootstrap capacitor connected between a bootstrap voltage bus, and a common node of the first switch and the second switch, and a bias power control circuit configured to function as a switched capacitor bootstrap circuit when the apparatus is configured to operate in a high impedance PFM mode, and configured to function as an active bootstrap circuit when the apparatus is configured to operate in another operating mode.
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公开(公告)号：US11762407B1
公开(公告)日：2023-09-19
申请号：US17814375
申请日：2022-07-22
Applicant: Halo Microelectronics International
Inventor： Gangqiang Zhang , Zhao Fang , Wenchao Qu
IPC: H03K17/687 , G05F1/56 , G01R19/00 , G01R1/20
CPC classification number: G05F1/56 , G01R1/203 , G01R19/0092 , H03K17/6872
Abstract: A signal processing apparatus includes a signal processing circuit configured to process a signal obtained from a voltage bus, a high voltage circuit configured to withstand a voltage stress when a high voltage is applied to the voltage bus, and a bypass circuit configured to bypass the high voltage circuit when a low voltage is applied to the voltage bus.
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公开(公告)号：US20230216292A1
公开(公告)日：2023-07-06
申请号：US17646666
申请日：2021-12-30
Applicant: Halo Microelectronics International
Inventor： Zhao Fang , Wenchao Qu , Gangqiang Zhang
Abstract: An apparatus includes a first diode and a second diode connected in series between a first voltage terminal and a second voltage terminal, a switch connected between the first voltage terminal and the second voltage terminal, and a clamping threshold circuit connected between a common node of the first diode and the second diode, and a gate of the switch, wherein the clamping threshold circuit is configured such that in response to a voltage surge applied to the common node of the first diode and the second diode, the switch is turned on once the voltage surge is greater than a predetermined threshold.
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公开(公告)号：US11837866B1
公开(公告)日：2023-12-05
申请号：US17855293
申请日：2022-06-30
Applicant: Halo Microelectronics International
Inventor： Zhao Fang , Gangqiang Zhang , Wenchao Qu
CPC classification number: H02H9/046 , H01L27/0266
Abstract: An ESD protection apparatus includes a discharge resistor and a transistor connected in series between a first voltage rail and a second voltage rail, a first coupling capacitor, a diode and a first bias resistor connected in series between the first voltage rail and the second voltage rail, wherein a common node of the diode and the first bias resistor is connected to a gate of the transistor, and an ESD protection device connected between the first voltage rail and the second voltage rail.
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