公开(公告)号：US20250072019A1

公开(公告)日：2025-02-27

申请号：US18770484

申请日：2024-07-11

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Jun Hwan SHIN ,  Young Ho Kim ,  Eui Su Lee ,  Jin Chul Cho ,  Soo Cheol Kang ,  Dong Woo Park ,  II Min Lee

IPC: H01L29/872 ,  H01L29/06 ,  H01L29/20 ,  H01L29/66

Abstract: Disclosed herein are a Schottky barrier diode (SBD) and a method of manufacturing the same. The SBD includes a substrate, an ohmic layer formed on a portion of an upper portion of the substrate, a Schottky layer formed on a portion of an upper portion of the ohmic layer, an insulating layer formed on a portion of the upper portion of the ohmic layer, a low-k material layer formed on a portion of the upper portion of the substrate, and a Schottky metal layer formed on portions of upper portions of the low-k material layer and the insulating layer.

公开(公告)号：US12176306B2

公开(公告)日：2024-12-24

申请号：US17396258

申请日：2021-08-06

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Sang Heung Lee ,  Soo Cheol Kang ,  Seong Il Kim ,  Hae Cheon Kim ,  Youn Sub Noh ,  Ho Kyun Ahn ,  Jong Won Lim ,  Sung Jae Chang ,  Hyun Wook Jung

IPC: H01L23/64 ,  H01L29/16 ,  H01L29/20 ,  H01L29/205

Abstract: An apparatus and method for generating an electrical circuit of semiconductor channel resistor including a first passive element part including a resistor and a capacitor connected in parallel between a first port and a second port, and an ohmic resistor connected in series to the resistor and the capacitor which are connected in parallel are provided. The apparatus includes a substrate selection part configured to receive a selected substrate item; a resistor selection part configured to receive a selected resistor item; a capacitor selection part configured to receive a selected capacitor item; and a circuit generating part configured to generate an electrical circuit from the selected substrate item, the selected resistor item, and the selected capacitor item.

公开(公告)号：US12166101B2

公开(公告)日：2024-12-10

申请号：US17671171

申请日：2022-02-14

Applicant: ELECTRONICS AND TELECOMMUNICATIONS RESEARCH INSTITUTE

Inventor： Soo Cheol Kang ,  Hyun Wook Jung ,  Seong IL Kim ,  Hae Cheon Kim ,  Youn Sub Noh ,  Ho Kyun Ahn ,  Sang Heung Lee ,  Jong Won Lim ,  Sung Jae Chang ,  Il Gyu Choi

IPC: H01L29/66 ,  H01L29/778

Abstract: A method of manufacturing a high-electron-mobility transistor device is provided. The method includes sequentially forming a transition layer and a semiconductor layer on a substrate, etching a portion of a surface of the semiconductor layer to form a barrier layer region having a certain depth and forming a barrier layer in the barrier layer region, forming a source electrode and a drain electrode on a 2-dimensional electron gas (2-DEG) layer upward exposed at a surface of the semiconductor layer, in defining the 2-DEG layer formed along an interface between the semiconductor layer and the barrier layer, forming a passivation layer on the semiconductor layer, the barrier layer, the source electrode, and the drain electrode and etching a portion of the passivation layer to upward expose the source electrode, the drain electrode, and the barrier layer, and forming a gate electrode on the upward exposed barrier layer.