公开(公告)号：US20230093114A1

公开(公告)日：2023-03-23

申请号：US17482322

申请日：2021-09-22

Applicant: Apple Inc.

Inventor： Ryan D. Bartling ,  Jafar Savoj ,  Brian S. Leibowitz ,  Shah M. Sharif

IPC: H03M1/06

Abstract: A serial data receiver circuit included in a computer system may include a front-end circuit, a sample circuit that includes multiple analog-to-digital converter circuits, and a recovery circuit. The front-end circuit may generate an equalized signal using multiple signals that encode a serial data stream of multiple data symbols. Based on a baud rate of the serial data stream, a determined number of the multiple analog-to-digital converter circuits sample, using a recovered clock signal, the equalized signal at the respective times to generate corresponding samples. The recovery circuit generates, using the samples, the recovered clock signal and recovered data symbols.

公开(公告)号：US11658671B2

公开(公告)日：2023-05-23

申请号：US17482322

申请日：2021-09-22

Applicant: Apple Inc.

Inventor： Ryan D. Bartling ,  Jafar Savoj ,  Brian S. Leibowitz ,  Shah M. Sharif

IPC: H03M1/00 ,  H03M1/06

CPC classification number: H03M1/0687 ,  H03M1/0626 ,  H03M1/0648 ,  H03M1/0663

Abstract: A serial data receiver circuit included in a computer system may include a front-end circuit, a sample circuit that includes multiple analog-to-digital converter circuits, and a recovery circuit. The front-end circuit may generate an equalized signal using multiple signals that encode a serial data stream of multiple data symbols. Based on a baud rate of the serial data stream, a determined number of the multiple analog-to-digital converter circuits sample, using a recovered clock signal, the equalized signal at the respective times to generate corresponding samples. The recovery circuit generates, using the samples, the recovered clock signal and recovered data symbols.

公开(公告)号：US20220317762A1

公开(公告)日：2022-10-06

申请号：US17659566

申请日：2022-04-18

Applicant: Apple Inc.

Inventor： Shah M. Sharif

IPC: G06F1/3293 ,  G06F1/3287 ,  G11C5/14

Abstract: A cross-domain power control circuit is disclosed. The circuit includes a first circuit branch having a first transistor coupled to a first supply voltage node and a second circuit branch having a second transistor coupled to the first supply voltage node. A third circuit branch is coupled between a second supply voltage node and a third supply voltage node. A second supply voltage conveyed on the second supply voltage node is less than a first supply voltage conveyed on the first supply voltage node. A fourth circuit branch is coupled between the first and third supply voltage nodes. In a first mode of operation, control circuitry causes the second supply voltage to be conveyed to the third supply voltage node. In a second mode of operation, the control circuitry causes the first supply voltage to be conveyed to the third supply voltage node.

公开(公告)号：US11307644B2

公开(公告)日：2022-04-19

申请号：US16522418

申请日：2019-07-25

Applicant: Apple Inc.

Inventor： Shah M. Sharif

IPC: G06F1/3287 ,  G06F1/3293 ,  G11C5/14

Abstract: A cross-domain power control circuit is disclosed. The circuit includes a first circuit branch having a first transistor coupled to a first supply voltage node and a second circuit branch having a second transistor coupled to the first supply voltage node. A third circuit branch is coupled between a second supply voltage node and a third supply voltage node. A second supply voltage conveyed on the second supply voltage node is less than a first supply voltage conveyed on the first supply voltage node. A fourth circuit branch is coupled between the first and third supply voltage nodes. In a first mode of operation, control circuitry causes the second supply voltage to be conveyed to the third supply voltage node. In a second mode of operation, the control circuitry causes the first supply voltage to be conveyed to the third supply voltage node.

公开(公告)号：US11675416B2

公开(公告)日：2023-06-13

申请号：US17659566

申请日：2022-04-18

Applicant: Apple Inc.

Inventor： Shah M. Sharif

IPC: G06F1/3293 ,  G06F1/3287 ,  G11C5/14

CPC classification number: G06F1/3293 ,  G06F1/3287 ,  G11C5/147

Abstract: A cross-domain power control circuit is disclosed. The circuit includes a first circuit branch having a first transistor coupled to a first supply voltage node and a second circuit branch having a second transistor coupled to the first supply voltage node. A third circuit branch is coupled between a second supply voltage node and a third supply voltage node. A second supply voltage conveyed on the second supply voltage node is less than a first supply voltage conveyed on the first supply voltage node. A fourth circuit branch is coupled between the first and third supply voltage nodes. In a first mode of operation, control circuitry causes the second supply voltage to be conveyed to the third supply voltage node. In a second mode of operation, the control circuitry causes the first supply voltage to be conveyed to the third supply voltage node.

公开(公告)号：US20210026438A1

公开(公告)日：2021-01-28

申请号：US16522418

申请日：2019-07-25

Applicant: Apple Inc.

Inventor： Shah M. Sharif

IPC: G06F1/3293 ,  G06F1/3287 ,  G11C5/14

Abstract: A cross-domain power control circuit is disclosed. The circuit includes a first circuit branch having a first transistor coupled to a first supply voltage node and a second circuit branch having a second transistor coupled to the first supply voltage node. A third circuit branch is coupled between a second supply voltage node and a third supply voltage node. A second supply voltage conveyed on the second supply voltage node is less than a first supply voltage conveyed on the first supply voltage node. A fourth circuit branch is coupled between the first and third supply voltage nodes. In a first mode of operation, control circuitry causes the second supply voltage to be conveyed to the third supply voltage node. In a second mode of operation, the control circuitry causes the first supply voltage to be conveyed to the third supply voltage node.