Memory error capture logic
    1.
    发明授权

    公开(公告)号:US09805825B1

    公开(公告)日:2017-10-31

    申请号:US14834055

    申请日:2015-08-24

    Applicant: Apple Inc.

    Inventor: Preminder Singh

    CPC classification number: G11C29/38 G11C29/12 G11C29/20 G11C29/26 G11C29/44

    Abstract: A built-in self test (BIST) may be performed on a device memory having two memory portions that are symmetrical (e.g., two symmetric halves of the device memory). The BIST may be run on the first memory portion. Error logic output from the first memory portion is captured (stored) in the second memory portion during the BIST run process. Error logic output from the first memory portion may include error data and an address of the memory error in the first memory portion. As the first and second memory portions are symmetric, the memory errors captured (stored) in the second memory portion are located at identical locations to the location of the memory errors in the first memory portion. A memory dump from the second memory portion after the BIST may provide a map of the memory errors in the first memory portion.

    OPERATING SURFACE CHARACTERIZATION FOR INTEGRATED CIRCUITS
    2.
    发明申请
    OPERATING SURFACE CHARACTERIZATION FOR INTEGRATED CIRCUITS 有权
    集成电路的工作表面特性

    公开(公告)号:US20150212120A1

    公开(公告)日:2015-07-30

    申请号:US14168177

    申请日:2014-01-30

    Applicant: Apple Inc.

    CPC classification number: G01R31/3004 G01R31/2879 G06F1/324 H01L22/34

    Abstract: A device includes an integrated circuit programmed with an operating surface equation. The operating surface equation may define an operating point as a function of operating voltage, operating frequency, and leakage current. The operating surface equation may be generated by fitting a surface equation to data for operating voltage and operating frequency versus leakage current for a plurality of test integrated circuits. An operating voltage of the integrated circuit at a given operating frequency may be determined by the operating surface equation and a leakage current value fused into the device.

    Abstract translation: 一种器件包括用操作表面方程编程的集成电路。 操作表面方程可以将工作点定义为工作电压,工作频率和漏电流的函数。 可以通过将表面方程拟合到用于多个测试集成电路的工作电压和工作频率对漏电流的数据来产生操作表面方程。 在给定工作频率下的集成电路的工作电压可以通过工作表面方程和融合到器件中的漏电流值来确定。

    CONTINUOUS VOLTAGE PRODUCT BINNING
    3.
    发明申请
    CONTINUOUS VOLTAGE PRODUCT BINNING 有权
    连续电压产品结合

    公开(公告)号:US20140316731A1

    公开(公告)日:2014-10-23

    申请号:US13868540

    申请日:2013-04-23

    Applicant: APPLE INC.

    CPC classification number: H01L22/20 H01L22/14

    Abstract: A binning process uses curve fitting to create and assign one or more bins based on testing data of operating voltage versus leakage current for test integrated circuits. Each bin is created by assigning an initial operating voltage to the bin and fitting a curve to the testing data population. An equation is generated describing the fitted curve. Integrated circuits are binned by measuring the leakage current at a selected operating voltage and testing the integrated circuit at one or more operating voltages determined based on the fitted curves. The integrated circuits are assigned a maximum operating voltage that corresponds to the lowest tested operating voltage at which the integrated circuit passes the test.

    Abstract translation: 合并过程使用曲线拟合来创建和分配一个或多个基于测试集成电路的工作电压与泄漏电流的测试数据。 每个仓是通过将初始工作电压分配给仓并将曲线拟合到测试数据群来创建的。 生成描述拟合曲线的方程式。 集成电路通过测量所选工作电压下的漏电流并在基于拟合曲线确定的一个或多个工作电压下测试集成电路进行分组。 分配集成电路的最大工作电压对应于集成电路通过测试的最低测试工作电压。

    Dynamic operating surface for integrated circuits
    4.
    发明授权
    Dynamic operating surface for integrated circuits 有权
    集成电路动态工作面

    公开(公告)号:US09563220B1

    公开(公告)日:2017-02-07

    申请号:US14974849

    申请日:2015-12-18

    Applicant: Apple Inc.

    Inventor: Preminder Singh

    CPC classification number: G05F3/02 G01R31/2879 G01R31/3004 G06F1/324 H01L22/34

    Abstract: A device includes an integrated circuit programmed with an operating surface equation. The operating surface equation may define an operating point as a function of operating voltage, operating frequency, leakage current, and one or more additional operating factors. The additional operating factors may be, for example, an operating temperature of the integrated circuit, a number of active execution units in the integrated circuit, and/or an age of the integrated circuit. The operating surface equation may be adjusted based on changes in one or more of the additional operating factors. Changes in the operating surface equation may change the operating surface of the integrated circuit. Thus, operating points (e.g., operating voltage) of the integrated circuit may be adjusted in response to changes in the additional operating factors.

    Abstract translation: 一种器件包括用操作表面方程编程的集成电路。 操作表面方程式可以将工作点定义为工作电压,工作频率,漏电流以及一个或多个附加操作系数的函数。 附加的操作因素可以是例如集成电路的工作温度,集成电路中的多个有效执行单元和/或集成电路的时代。 可以基于一个或多个附加操作因素的变化来调整操作表面方程。 操作面方程的变化可能改变集成电路的工作表面。 因此,集成电路的操作点(例如,工作电压)可以响应于附加操作因素的变化来调整。

    Continuous voltage product binning
    5.
    发明授权
    Continuous voltage product binning 有权
    连续电压产品合并

    公开(公告)号:US09368416B2

    公开(公告)日:2016-06-14

    申请号:US13868540

    申请日:2013-04-23

    Applicant: Apple Inc.

    CPC classification number: H01L22/20 H01L22/14

    Abstract: A binning process uses curve fitting to create and assign one or more bins based on testing data of operating voltage versus leakage current for test integrated circuits. Each bin is created by assigning an initial operating voltage to the bin and fitting a curve to the testing data population. An equation is generated describing the fitted curve. Integrated circuits are binned by measuring the leakage current at a selected operating voltage and testing the integrated circuit at one or more operating voltages determined based on the fitted curves. The integrated circuits are assigned a maximum operating voltage that corresponds to the lowest tested operating voltage at which the integrated circuit passes the test.

    Abstract translation: 合并过程使用曲线拟合来创建和分配一个或多个基于测试集成电路的工作电压与泄漏电流的测试数据。 每个仓是通过将初始工作电压分配给仓并将曲线拟合到测试数据群来创建的。 生成描述拟合曲线的方程式。 集成电路通过测量所选工作电压下的漏电流并在基于拟合曲线确定的一个或多个工作电压下测试集成电路进行分组。 分配集成电路的最大工作电压对应于集成电路通过测试的最低测试工作电压。

    Operating surface characterization for integrated circuits
    6.
    发明授权
    Operating surface characterization for integrated circuits 有权
    集成电路的工作表面特性

    公开(公告)号:US09291670B2

    公开(公告)日:2016-03-22

    申请号:US14168177

    申请日:2014-01-30

    Applicant: Apple Inc.

    CPC classification number: G01R31/3004 G01R31/2879 G06F1/324 H01L22/34

    Abstract: A device includes an integrated circuit programmed with an operating surface equation. The operating surface equation may define an operating point as a function of operating voltage, operating frequency, and leakage current. The operating surface equation may be generated by fitting a surface equation to data for operating voltage and operating frequency versus leakage current for a plurality of test integrated circuits. An operating voltage of the integrated circuit at a given operating frequency may be determined by the operating surface equation and a leakage current value fused into the device.

    Abstract translation: 一种器件包括用操作表面方程编程的集成电路。 操作表面方程可以将工作点定义为工作电压,工作频率和漏电流的函数。 可以通过将表面方程拟合到用于多个测试集成电路的工作电压和工作频率对漏电流的数据来产生操作表面方程。 在给定工作频率下的集成电路的工作电压可以通过工作表面方程和融合到器件中的漏电流值来确定。

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