公开(公告)号：US20250110740A1

公开(公告)日：2025-04-03

申请号：US18798800

申请日：2024-08-08

Applicant: Apple Inc.

Inventor： Evan R. Lissoos ,  Anurag Choudhury ,  Casper R. van Benthem

IPC: G06F9/30

Abstract: Techniques are disclosed involving selective toggle suppression in multiplexed datapaths. An embodiment of an apparatus includes a storage circuit and a control circuit. The storage circuit is configured to store a set of previous select values transmitted as a set of previous select signals to a multiplexer within a datapath of a computing device. The control circuit is configured to determine, based at least in part on the set of previous select signals and a set of input toggle likelihood signals, whether to maintain the set of previous select signals or provide a set of updated select signals to the multiplexer. In a further embodiment, the control circuit is further configured to determine whether a value of a particular input toggle likelihood signal corresponding to a previously selected data input of the multiplexer indicates a designation of the previously-selected data input as likely to receive a data value change.

公开(公告)号：US20250103292A1

公开(公告)日：2025-03-27

申请号：US18426020

申请日：2024-01-29

Applicant: Apple Inc.

Inventor： David K. Li ,  Christopher A. Burns ,  Daniel E. Barnard ,  Evan R. Lissoos

IPC: G06F7/544 ,  G06F7/501 ,  G06F17/16

Abstract: Techniques are disclosed relating to integrated circuits that support matrix operations. In various embodiments, an integrated circuit comprises a dot product accumulate circuit that includes a dot product circuit configured to determine a dot product of a first vector and a second vector, and an adder circuit coupled to an output of the dot product circuit and configured to add a result of the dot product and an accumulation value. The integrated circuit further includes an accumulator cache coupled to an input of the adder circuit and an output of the adder circuit. The accumulator cache is configured to provide the accumulation value to the adder circuit and store a result of the add as a subsequent accumulation value for a subsequent dot product accumulate operation.

公开(公告)号：US20250110734A1

公开(公告)日：2025-04-03

申请号：US18818134

申请日：2024-08-28

Applicant: Apple Inc.

Inventor： Anurag Choudhury ,  Evan R. Lissoos

IPC: G06F9/30

Abstract: Techniques are disclosed involving selection circuitry for stored operands. An embodiment of an apparatus includes a random-access storage element array and a permute network. The storage element array is configured to store a set of input data to an operation in a set of entries allocated among one or more execution lanes. The permute network is connected to each entry of the set of entries and is configured to select from among the set of entries to provide operands to one or more source inputs of execution circuitry configured to perform the operation. For a given source input, the permute network provides connection to only a subset of the entries that are allocated to a given execution lane. In a further embodiment, the permute network is configured to support multiple modes of the operation.