公开(公告)号：US06745317B1

公开(公告)日：2004-06-01

申请号：US09364838

申请日：1999-07-30

申请人： Ethan Mirsky ,  Robert French ,  Ian Eslick

发明人： Ethan Mirsky ,  Robert French ,  Ian Eslick

IPC分类号： G06F1517

CPC分类号： G06F15/8023

摘要： A method and an apparatus for configuration of multiple context processing elements (MCPEs)are described. According to one aspect of the invention, the structure that joins the MCPE cores into a complete array in one embodiment is actually a set of several mesh-like interconnect structures. Each interconnect structure forms a network, and each network is independent in that it uses different paths, but the networks join at MCPE input switches. The network structure of one embodiment of the present invention is comprised of a local area broadcast network (level 1), a switched interconnect network (level 2), a shared bus network (level 3), and a broadcast network. In one embodiment, the level 3 network is used to carry configuration data for the MCPEs while the broadcast network is used to carry configuration data for the level 3 network drivers and switches. In one embodiment, the level 3 network is bidirectional and dynamically routable.

摘要翻译： 描述了用于配置多个上下文处理元件（MCPE）的方法和装置。 根据本发明的一个方面，在一个实施例中将MCPE核心连接成完整阵列的结构实际上是一组几个网状互连结构。 每个互连结构形成网络，并且每个网络是独立的，因为它使用不同的路径，但是网络在MCPE输入交换机处连接。 本发明的一个实施例的网络结构包括局域广播网络（1级），交换互连网络（2级），共享总线网络（3级）和广播网络。 在一个实施例中，级别3网络用于承载MCPE的配置数据，而广播网络用于承载3级网络驱动器和交换机的配置数据。 在一个实施例中，3级网络是双向的并且是可动态路由的。

公开(公告)号：US07266672B2

公开(公告)日：2007-09-04

申请号：US10320018

申请日：2002-12-16

申请人： Ethan Mirsky ,  Robert French ,  Ian Eslick

发明人： Ethan Mirsky ,  Robert French ,  Ian Eslick

IPC分类号： G06F15/80 ,  G06F15/177

CPC分类号： G06F15/8007 ,  G06F15/8023

摘要： A method and an apparatus for retiming in a network of multiple context processing elements in a network of multiple context processing elements are provided. A programmable delay element is configured to programmably delay signals between a number of multiple context processing elements of an array without requiring a multiple context processing element to implement the delay. The output of a first multiple context processing element is coupled to a first multiplexer and to the input of a number of serially connected delay registers. The output of each of the serially connected registers is coupled to the input of a second multiplexer. The output of the second multiplexer is coupled to the input of the first multiplexer, and the output of the first multiplexer is coupled to a second multiple context processing element. The first and second multiplexers are provided with at least one set of data representative of at least one configuration memory context of a multiple context processing element. The first and second multiplexers are controlled to select one of a number of delay durations in response to the received set of data. A delay is programmed in the network structure in response to a data type being transferred between particular multiple context processing elements.

摘要翻译： 提供了一种用于在多个上下文处理元件的网络中的多个上下文处理元件的网络中重定时的方法和装置。 可编程延迟元件被配置为可编程地延迟阵列的多个上下文处理元件之间的信号，而不需要多个上下文处理元件来实现延迟。 第一多重上下文处理元件的输出耦合到第一多路复用器和多个串行连接的延迟寄存器的输入。 每个串行连接的寄存器的输出耦合到第二多路复用器的输入端。 第二多路复用器的输出耦合到第一多路复用器的输入，第一多路复用器的输出耦合到第二多重上下文处理元件。 第一和第二多路复用器被提供有表示多个上下文处理元件的至少一个配置存储器上下文的至少一组数据。 控制第一和第二多路复用器以响应于所接收的数据集来选择多个延迟持续时间中的一个。 响应于在特定多个上下文处理元件之间传送的数据类型，在网络结构中编程延迟。

公开(公告)号：US6108760A

公开(公告)日：2000-08-22

申请号：US962187

申请日：1997-10-31

申请人： Ethan Mirsky ,  Robert French ,  Ian Eslick

发明人： Ethan Mirsky ,  Robert French ,  Ian Eslick

IPC分类号： G06F13/40 ,  G06F15/80 ,  G06F12/08

CPC分类号： G06F13/4022 ,  G06F15/8007

摘要： A method and an apparatus for position independent reconfiguration in a network of multiple context processing elements are provided. Wach multiple context processing element in a networked array of multiple context processing elements has an assigned physical identification. Virtual identifications may also be assigned to a number of the multiple context processing elements. Data is transmitted to at least one of the multiple context processing elements of the array, the data comprising control data, configuration data, an address mask, and a destination identification. The transmitted address mask is applied to either the physical or virtual identification and to a destination identification. The masked physical or virtual identification is compared to the masked destination identification. When the masked physical or virtual identification of a multiple context processing element matches the masked destination identification, at least one of the number of multiple context processing elements are manipulated in response to the transmitted data. Manipulation comprises programming a multiple context processing element with at least one configuration memory context and selecting a configuration memory context to control the functioning of the multiple context processing element.

摘要翻译： 提供了一种在多个上下文处理元件的网络中用于位置无关重新配置的方法和装置。 在多个上下文处理元件的网络阵列中的多个上下文处理元素具有分配的物理标识。 虚拟标识也可以被分配给多个上下文处理元件的数量。 数据被发送到阵列的多个上下文处理元件中的至少一个，数据包括控制数据，配置数据，地址掩码和目的地标识。 发送的地址掩码应用于物理或虚拟标识和目标标识。 将屏蔽的物理或虚拟标识与掩蔽的目的地标识进行比较。 当多个上下文处理元件的掩蔽的物理或虚拟标识匹配掩蔽的目的地标识符时，多个上下文处理元件的数目中的至少一个被响应于发送的数据被操纵。 操作包括使用至少一个配置存储器上下文编程多个上下文处理元件，并且选择配置存储器上下文来控制多个上下文处理元件的功能。

公开(公告)号：US5742180A

公开(公告)日：1998-04-21

申请号：US386851

申请日：1995-02-10

申请人： Andre DeHon ,  Thomas F. Knight, Jr. ,  Edward Tau ,  Michael Bolotski ,  Ian Eslick ,  Derrick Chen ,  Jeremy Brown

发明人： Andre DeHon ,  Thomas F. Knight, Jr. ,  Edward Tau ,  Michael Bolotski ,  Ian Eslick ,  Derrick Chen ,  Jeremy Brown

IPC分类号： G06F15/78 ,  H03K19/173 ,  H03K19/177

CPC分类号： G06F15/7867 ,  H03K19/1737 ,  H03K19/17704 ,  H03K19/17728 ,  H03K19/17736 ,  H03K19/17752 ,  H03K19/1776

摘要： An integrated dynamically programmable gate array comprises a two dimensional array of programmable gates. These gates can be implemented as look up tables but hardwired gates with programmable interconnections are also possible. Each one of the gates receives plural input logic signals from plural other gates. Consequently, a broad range of logic combinations are possible. The gates further include locally stored multiple contexts dictating different combinatorial logic operations performed by the gates. The contexts increase the logic operations performable by the gate and the fact that the contexts are locally stored enables better integration and speed. Only a context instruction needs to be distributed among programmable gates. A context signal generator is included that generates a context signal indicating a change in an active one of the contexts. This active context dictates the logic operations of the gates that commonly receive by the signal. Since the contexts information is stored on the gate array, and specifically locally, the context signal can change as fast as every clock cycle of the programmable gate array. To increase functionality, context memory arrays, which store context programming information, are separately addressable so that a new truth table is storable in a first one of the context memory arrays while a truth table of a second one of the context memory arrays is dictating the logic operations performed by the gates. As a result, the functionality of each programmable gate can be increased by increasing the number of available functions for that programmable gate.

摘要翻译： 集成的动态可编程门阵列包括可编程门的二维阵列。 这些门可以被实现为查找表，但是具有可编程互连的硬连线也是可能的。 每个门从多个其他门接收多个输入逻辑信号。 因此，广泛的逻辑组合是可能的。 门还包括本地存储的多个上下文，其规定由门执行的不同的组合逻辑操作。 上下文增加了由门执行的逻辑操作以及上下文本地存储的事实，可以实现更好的集成和速度。 只有上下文指令需要在可编程门之间分配。 包括上下文信号发生器，其产生指示上下文中活动的一个的改变的上下文信号。 该有源上下文指示通常由信号接收的门的逻辑运算。 由于上下文信息存储在门阵列上，特别是在本地，上下文信号可以像可编程门阵列的每个时钟周期一样快地改变。 为了增加功能，存储上下文编程信息的上下文存储器阵列是可单独寻址的，使得新的真值表可存储在上下文存储器阵列中的第一个存储器阵列中，而第二个上下文存储器阵列的真值表指示 由门执行的逻辑操作。 结果，可以通过增加可编程门的可用功能的数量来增加每个可编程门的功能。

公开(公告)号：US07480489B2

公开(公告)日：2009-01-20

申请号：US10994618

申请日：2004-11-22

申请人： Ian Eslick ,  Mike (Hon Fai) Chu

发明人： Ian Eslick ,  Mike (Hon Fai) Chu

IPC分类号： H04B1/00

CPC分类号： H04L1/0061 ,  H03M7/30 ,  H04L1/0041 ,  H04L1/0072

摘要： A processor within a wireless terminal performs data compression, decompression and error correction according to a data compression protocol such as the V.42bis data compression protocol used within GSM wireless networks. This processor includes an interface that receives incoming information or data to be compressed or decompressed according to the data compression protocol. A processing module within the processor is operably coupled to the interface to receive and process the incoming information. Instructions executed within the processing module will divide the processing responsibilities between the processing module and a data compression/decompression accelerator operably coupled to the processing module. Compute intensive operations may be offloaded from the processing module onto the data compression/decompression accelerator to improve overall system efficiency.

摘要翻译： 无线终端中的处理器根据诸如在GSM无线网络中使用的V.42bis数据压缩协议的数据压缩协议执行数据压缩，解压缩和纠错。 该处理器包括接收根据数据压缩协议来进行压缩或解压缩的输入信息或数据的接口。 处理器内的处理模块可操作地耦合到接口以接收和处理输入信息。 在处理模块内执行的指令将划分处理模块与可操作地耦合到处理模块的数据压缩/解压缩加速器之间的处理责任。 可以将计算密集型操作从处理模块卸载到数据压缩/解压缩加速器上，以提高整体系统效率。

公开(公告)号：US07188192B2

公开(公告)日：2007-03-06

申请号：US10838071

申请日：2004-05-03

申请人： Ethan Mirsky ,  Robert French ,  Ian Eslick

发明人： Ethan Mirsky ,  Robert French ,  Ian Eslick

IPC分类号： G06F15/163

CPC分类号： G06F9/3885 ,  G06F15/7867 ,  G06F15/8007

摘要： A method and apparatus for providing local control of processing elements in a network of multiple context processing elements (MCPEs). A MCPE stores configuration memory contexts and maintains data of a current configuration. State information is received from at least one other MCPE. A configuration control signal is generated in response to the state information and current configuration data. A MCPE is selected in response to the configuration control signal to control the MCPE. Each MCPE in the networked array has an assigned physical and virtual identification. Data comprising control data, configuration data, an address mask, and a destination identification is transmitted to a MCPE. The transmitted address mask is applied to either a physical or a virtual identification, and to a destination identification. The masked physical or virtual identification is compared to the masked destination identification. When the masked physical or virtual identification matches the masked destination identification, a MCPE is manipulated in response to the transmitted data by selecting one of a number of configuration memory contexts to control the functioning of the MCPE.

摘要翻译： 一种用于在多个上下文处理元件（MCPE）的网络中提供处理元件的本地控制的方法和装置。 MCPE存储配置存储器上下文并维护当前配置的数据。 从至少一个其他MCPE接收状态信息。 响应于状态信息和当前配置数据产生配置控制信号。 选择MCPE以响应配置控制信号来控制MCPE。 网络阵列中的每个MCPE都有一个分配的物理和虚拟标识。 包含控制数据，配置数据，地址掩码和目的地标识的数据被发送到MCPE。 发送的地址掩码被应用于物理或虚拟标识以及目的地标识。 将屏蔽的物理或虚拟标识与掩蔽的目的地标识进行比较。 当屏蔽的物理或虚拟标识与掩蔽的目的地标识匹配时，通过选择多个配置存储器上下文中的一个来控制MCPE的功能来响应于所发送的数据来操纵MCPE。

公开(公告)号：US20060123308A1

公开(公告)日：2006-06-08

申请号：US10994618

申请日：2004-11-22

申请人： Ian Eslick ,  Mike Chu

发明人： Ian Eslick ,  Mike Chu

IPC分类号： H04L1/00 ,  G08C25/00 ,  H03M13/00 ,  G06F11/00 ,  G06F11/30

CPC分类号： H04L1/0061 ,  H03M7/30 ,  H04L1/0041 ,  H04L1/0072

摘要： A processor within a wireless terminal performs data compression, decompression and error correction according to a data compression protocol such as the V.42bis data compression protocol used within GSM wireless networks. This processor includes an interface that receives incoming information or data to be compressed or decompressed according to the data compression protocol. A processing module within the processor is operably coupled to the interface to receive and process the incoming information. Instructions executed within the processing module will divide the processing responsibilities between the processing module and a data compression/decompression accelerator operably coupled to the processing module. Compute intensive operations may be offloaded from the processing module onto the data compression/decompression accelerator to improve overall system efficiency.

公开(公告)号：US06990566B2

公开(公告)日：2006-01-24

申请号：US10828039

申请日：2004-04-20

申请人： Ethan Mirsky ,  Robert French ,  Ian Eslick

发明人： Ethan Mirsky ,  Robert French ,  Ian Eslick

IPC分类号： G06F15/17

CPC分类号： G06F15/8023

摘要： A method and an apparatus for configuration of multiple context processing elements (MCPEs) are described. The method and an apparatus is capable of selectively transmitting data over a bidirectional shared bus network including a plurality of channels between pairs of MCPEs in the networked array. The method and an apparatus then selectively transmits a sideband bit indicating a direction in which the data is transmitted in the shared bus network.

摘要翻译： 描述了用于配置多个上下文处理元件（MCPE）的方法和装置。 该方法和设备能够通过包括网络阵列中的MCPE对之间的多个信道的双向共享总线网络选择性地发送数据。 然后，该方法和设备选择性地发送表示在共享总线网络中发送数据的方向的边带位。

公开(公告)号：US06553479B2

公开(公告)日：2003-04-22

申请号：US10210411

申请日：2002-07-31

申请人： Ethan Mirsky ,  Robert French ,  Ian Eslick

发明人： Ethan Mirsky ,  Robert French ,  Ian Eslick

IPC分类号： G06F1577

CPC分类号： G06F9/3885 ,  G06F15/7867 ,  G06F15/8007

摘要： A method and apparatus for providing local control of processing elements in a network of multiple context processing element are provided. A multiple context processing element is configured to store a number of configuration memory contexts. This multiple context processing element maintains data of a current configuration. State information is received from at least one other multiple context processing element. At least one configuration control signal is generated in responses to the state information and the data of a current configuration. One of multiple configuration memory contexts is selected in response to the configuration control signal, the selected configuration memory context controlling the multiple context processing element. Each multiple context processing element in the networked array of multiple context processing elements has an assigned physical and virtual identification. Data is transmitted to at least one of the multiple context processing elements of the array, the data comprising control data, configuration data, an address mask, and a destination identification. The transmitted address mask is applied to either the physical or virtual identification and to a destination identification. The masked physical or virtual identification is compared to the masked destination identification. When the masked physical or virtual identification of a multiple context processing element matches the masked destination identification, at least one of the number of multiple context processing elements are manipulated in response to the transmitted data. Manipulation comprises selecting one of a number of configuration memory contexts to control the functioning of the multiple context processing element.

摘要翻译： 提供了一种用于在多个上下文处理元件的网络中提供处理元件的本地控制的方法和装置。 多上下文处理元件被配置为存储多个配置存储器上下文。 该多重上下文处理元件维护当前配置的数据。 从至少一个其他多个上下文处理单元接收状态信息。 响应于状态信息和当前配置的数据生成至少一个配置控制信号。 响应于配置控制信号选择多个配置存储器上下文中的一个，所选择的配置存储器上下文控制多个上下文处理元件。 多个上下文处理元件的联网阵列中的每个多个上下文处理元素具有分配的物理和虚拟标识。 数据被发送到阵列的多个上下文处理元件中的至少一个，数据包括控制数据，配置数据，地址掩码和目的地标识。 发送的地址掩码应用于物理或虚拟标识和目标标识。 将掩蔽的物理或虚拟标识与掩蔽的目的地标识进行比较。 当多个上下文处理元件的掩蔽的物理或虚拟标识匹配掩蔽的目的地标识符时，多个上下文处理元件的数目中的至少一个被响应于发送的数据被操纵。 操作包括选择多个配置存储器上下文中的一个以控制多个上下文处理元件的功能。

公开(公告)号：US06526498B1

公开(公告)日：2003-02-25

申请号：US09504203

申请日：2000-02-15

申请人： Ethan Mirsky ,  Robert French ,  Ian Eslick

发明人： Ethan Mirsky ,  Robert French ,  Ian Eslick

IPC分类号： G06F1580

CPC分类号： G06F15/8007 ,  G06F15/8023

摘要： A method and an apparatus for retiming in a network of multiple context processing elements are provided. A programmable delay element is configured to programmably delay signals between a number of multiple context processing elements of an array without requiring a multiple context processing element to implement the delay. The output of a first multiple context processing element is coupled to a first multiplexer and to the input of a number of serially connected delay registers. The output of each of the serially connected delay registers is coupled to the input of a second multiplexer. The output of the second multiplexer is coupled to the input of the first multiplexer, and the output of the first multiplexer is coupled to a second multiple context processing element. The first and second multiplexers are provided with at least one set of data representative of at least one configuration memory context of a multiple context processing element. The first and second multiplexers are controlled to select one of a number of delay durations in response to the received set of data. A delay is programmed in the network structure in response to a data type being transferred between particular multiple context processing elements.

摘要翻译： 提供了一种用于在多个上下文处理元件的网络中重定时的方法和装置。 可编程延迟元件被配置为可编程地延迟阵列的多个上下文处理元件之间的信号，而不需要多个上下文处理元件来实现延迟。 第一多重上下文处理元件的输出耦合到第一多路复用器和多个串行连接的延迟寄存器的输入。 每个串行连接的延迟寄存器的输出耦合到第二多路复用器的输入。 第二多路复用器的输出耦合到第一多路复用器的输入，第一多路复用器的输出耦合到第二多重上下文处理元件。 第一和第二多路复用器被提供有表示多个上下文处理元件的至少一个配置存储器上下文的至少一组数据。 控制第一和第二多路复用器以响应于所接收的数据集来选择多个延迟持续时间中的一个。 响应于在特定多个上下文处理元件之间传送的数据类型，在网络结构中编程延迟。