Method and apparatus for demultiplexing optical signals in a passive optical network
    1.
    发明授权
    Method and apparatus for demultiplexing optical signals in a passive optical network 失效
    用于在无源光网络中解复用光信号的方法和装置

    公开(公告)号:US08023782B2

    公开(公告)日:2011-09-20

    申请号:US12403967

    申请日:2009-03-13

    CPC classification number: G02B6/4246 G02B6/2931 G02B6/2938

    Abstract: Methods and structures are disclosed demultiplexing optical signals transmitted over an optical fiber into a silicon substrate and to multiple detectors. The silicon substrate has two spaced-apart surfaces and a diffractive element disposed adjacent to one of the surfaces. Each of the optical signals corresponds to one of multiple wavelengths. The optical signals are directed into the silicon substrate along a path through the first surface to be incident on the diffractive element. The path is oriented generally normal with the first surface and/or with the diffractive element, which angularly separates the optical signals such that each of the wavelengths traverses through the substrate in a wavelength dependent direction to the first surface. Each optical signal is steered from the first surface towards the second surface to be incident on different optical elements that direct them generally normal to the first surface to be incident on one of the detectors.

    Abstract translation: 公开了将光纤传输到硅衬底和多个检测器中的方法和结构。 硅衬底具有两个间隔开的表面和与其中一个表面相邻设置的衍射元件。 每个光信号对应于多个波长中的一个。 沿着穿过第一表面的路径将光信号引导到硅衬底中以入射到衍射元件上。 该路径与第一表面和/或衍射元件大致正交地定向,该衍射元件使光信号成角度地分离,使得每个波长沿着与第一表面波长相关的方向穿过衬底。 每个光信号从第一表面转向第二表面以入射到不同的光学元件上,这些光学元件将它们大致垂直于第一表面入射到其中一个检测器上。

    Pulsed quantum dot laser system with low jitter
    2.
    发明授权
    Pulsed quantum dot laser system with low jitter 失效
    脉冲量子点激光系统具有低抖动

    公开(公告)号:US07103079B2

    公开(公告)日:2006-09-05

    申请号:US10878481

    申请日:2004-06-28

    Abstract: A circuit for generating a clock or sampling signal, the circuit including: a semiconductor quantum dot laser element including a region of quantum dots, wherein the region of quantum dots is characterized by an emission distribution having a half-width of at least about 10 meV; and drive circuitry connected to the quantum dot laser element for operating the quantum dot laser element as a mode-locked laser that outputs a periodic, uniformly spaced sequence of pulses, wherein the clock or sampling signal is derived from the sequence of pulses.

    Abstract translation: 一种用于产生时钟或采样信号的电路,所述电路包括:包括量子点区域的半导体量子点激光元件,其中量子点的区域的特征在于具有至少约10meV的半宽度的发射分布 ; 以及连接到量子点激光元件的驱动电路,用于操作量子点激光元件作为输出周期性,均匀间隔的脉冲序列的锁模激光器,其中时钟或采样信号是从脉冲序列导出的。

    Ridge technique for fabricating an optical detector and an optical waveguide
    5.
    发明授权
    Ridge technique for fabricating an optical detector and an optical waveguide 失效
    用于制造光学检测器和光波导的脊技术

    公开(公告)号:US07760980B2

    公开(公告)日:2010-07-20

    申请号:US11514291

    申请日:2006-08-31

    Abstract: A method of fabricating on a substrate an optical detector in an optical waveguide, the method involving: forming at least one layer on a surface of the substrate, said at least one layer comprising SiGe; implanting an impurity into the at least one layer over a first area to form a detector region for the optical detector; etching into the at least one layer in a first region and a second region to form a ridge between the first and second regions, said ridge defining the optical detector and the optical waveguide; filling the first and second regions with a dielectric material having a lower refractive index than SiGe; and after filling the first and second regions with the dielectric material, removing surface material to form a planarized upper surface.

    Abstract translation: 一种在光波导中在基板上制造光检测器的方法,所述方法包括:在所述基板的表面上形成至少一层,所述至少一层包括SiGe; 在第一区域上将杂质注入到所述至少一个层中以形成用于所述光学检测器的检测器区域; 在第一区域和第二区域中蚀刻到所述至少一个层中以在所述第一和第二区域之间形成脊,所述脊限定所述光学检测器和所述光波导; 用具有比SiGe低的折射率的电介质材料填充第一和第二区域; 并且在用电介质材料填充第一和第二区域之后,去除表面材料以形成平坦化的上表面。

    Method and apparatus for demultiplexing optical signals in a passive optical network
    6.
    发明授权
    Method and apparatus for demultiplexing optical signals in a passive optical network 失效
    用于在无源光网络中解复用光信号的方法和装置

    公开(公告)号:US07505647B2

    公开(公告)日:2009-03-17

    申请号:US11771760

    申请日:2007-06-29

    CPC classification number: G02B6/4246 G02B6/2931 G02B6/2938

    Abstract: Methods and structures are disclosed demultiplexing optical signals transmitted over an optical fiber into a silicon substrate and to multiple detectors. The silicon substrate has two spaced-apart surfaces and a diffractive element disposed adjacent to one of the surfaces. Each of the optical signals corresponds to one of multiple wavelengths. The optical signals are directed into the silicon substrate along a path through the first surface to be incident on the diffractive element. The path is oriented generally normal with the first surface and/or with the diffractive element, which angularly separates the optical signals such that each of the wavelengths traverses through the substrate in a wavelength dependent direction to the first surface. Each optical signal is steered from the first surface towards the second surface to be incident on different optical elements that direct them generally normal to the first surface to be incident on one of the detectors.

    Abstract translation: 公开了将光纤传输到硅衬底和多个检测器中的方法和结构。 硅衬底具有两个间隔开的表面和与其中一个表面相邻设置的衍射元件。 每个光信号对应于多个波长中的一个。 沿着穿过第一表面的路径将光信号引导到硅衬底中以入射到衍射元件上。 该路径与第一表面和/或衍射元件大致正交,该衍射元件使光信号成角度地分离,使得每个波长以与波长相关的方向穿过基板。 每个光信号从第一表面转向第二表面以入射到不同的光学元件上,这些光学元件将它们大致垂直于第一表面入射到其中一个检测器上。

    Planar integrated circuit including a plasmon waveguide-fed Schottky barrier detector and transistors connected therewith
    7.
    发明授权
    Planar integrated circuit including a plasmon waveguide-fed Schottky barrier detector and transistors connected therewith 失效
    平面集成电路包括等离子体波导馈电肖特基势垒检测器和与其连接的晶体管

    公开(公告)号:US07170142B2

    公开(公告)日:2007-01-30

    申请号:US10854075

    申请日:2004-05-26

    Abstract: A planar integrated circuit includes a semiconductor substrate having a substrate surface and a trench in the substrate, a waveguide medium in the trench having a top surface and a light propagation axis, the trench having a sufficient depth for the waveguide medium to be at or below said substrate surface, and at least one Schottky barrier electrode formed on the top surface of said waveguide medium and defining a Schottky barrier detector consisting of the electrode and the portion of the waveguide medium underlying the Schottky barrier electrode, at least the underlying portion of the waveguide medium being a semiconductor and defining an electrode-semiconductor interface parallel to the light propagation axis so that light of a predetermined wavelength from said waveguide medium propagates along the interface as a plasmon-polariton wave.

    Abstract translation: 平面集成电路包括具有衬底表面和衬底中的沟槽的半导体衬底,沟槽中的波导介质具有顶表面和光传播轴,沟槽具有足够的深度以使波导介质处于或低于 所述衬底表面和形成在所述波导介质的顶表面上的至少一个肖特基势垒电极,并且限定由所述电极和所述肖特基势垒电极下方的所述波导介质的所述部分组成的肖特基势垒检测器, 波导介质是半导体并且限定平行于光传播轴线的电极 - 半导体界面,使得来自所述波导介质的预定波长的光作为等离子体 - 激元波沿着界面传播。

    Wafer-level alignment of optical elements
    9.
    发明授权
    Wafer-level alignment of optical elements 失效
    光学元件的晶片级对准

    公开(公告)号:US07680376B2

    公开(公告)日:2010-03-16

    申请号:US11771642

    申请日:2007-06-29

    CPC classification number: G02B27/62

    Abstract: Methods are disclosed of fabricating an optical assembly. An active optical element is disposed near or on a first surface of a slab of optical material. A passive optical element is formed on a second surface of the slab, with the second surface being substantially parallel to the first surface. An optical axis of the passive optical element is aligned with an optical path between the passive optical element and an active region of the active optical element using a lithographic alignment process.

    Abstract translation: 公开了制造光学组件的方法。 有源光学元件设置在光学材料板的第一表面附近或之上。 无源光学元件形成在板坯的第二表面上,第二表面基本上平行于第一表面。 使用光刻对准过程,无源光学元件的光轴与无源光学元件与有源光学元件的有源区域之间的光路对准。

    EMBEDDED WAVEGUIDE DETECTORS
    10.
    发明申请
    EMBEDDED WAVEGUIDE DETECTORS 审中-公开
    嵌入式波形检测器

    公开(公告)号:US20090269878A1

    公开(公告)日:2009-10-29

    申请号:US12420558

    申请日:2009-04-08

    Abstract: A method of fabricating a detector that involves: forming a trench in a substrate, the substrate having an upper surface; forming a first doped semiconductor layer on the substrate and in the trench; forming a second semiconductor layer on the first doped semiconductor layer and extending into the trench, the second semiconductor layer having a conductivity that is less than the conductivity of the first doped semiconductor layer; forming a third doped semiconductor layer on the second semiconductor layer and extending into the trench; removing portions of the first, second and third layers that are above a plane defined by the surface of the substrate to produce an upper, substantially planar surface and expose an upper end of the first doped semiconductor layer in the trench; forming a first electrical contact to the first semiconductor doped layer; and forming a second electrical contact to the third semiconductor doped layer.

    Abstract translation: 一种制造检测器的方法,包括:在衬底中形成沟槽,所述衬底具有上表面; 在所述衬底和所述沟槽中形成第一掺杂半导体层; 在所述第一掺杂半导体层上形成第二半导体层并延伸到所述沟槽中,所述第二半导体层的导电率小于所述第一掺杂半导体层的导电性; 在所述第二半导体层上形成第三掺杂半导体层并延伸到所述沟槽中; 去除在由衬底的表面限定的平面之上的第一层,第二层和第三层的部分,以产生上部基本平坦的表面,并且暴露沟槽中的第一掺杂半导体层的上端; 形成第一电接触到第一半导体掺杂层; 以及向所述第三半导体掺杂层形成第二电接触。

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